參數(shù)資料
型號(hào)： TDA9875AH
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Digital TV Sound Processor DTVSP
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： PLASTIC, QFP
文件頁數(shù)： 68/96頁
文件大?。?/td> 296K
代理商： TDA9875AH
1999 Dec 20
68
Philips Semiconductors
Product specification
Digital TV Sound Processor (DTVSP)
TDA9875A
10.3.31 F
EATURE INTERFACE CONFIGURATION REGISTER
Table 69
Subaddress 36 (note 1)
Note
1.
The default setting at power-up is 0000 0000.
Table 70
System clock frequency selection
Note
1.
With 16.384 MHz the duty cycle is 33%.
BIT
NAME
VALUE
DESCRIPTION
7 (MSB)
6
5
4
3
2
B7
B6
B5
0
0
0
default value
default value
default value
system clock frequency selection (see Table 70)
SYSCL1
SYSCL0
SYSOUT
1
0
1
enables the output of a system (or master) clock signal at pin SYSCLK
the output will be off, thereby improving the EMC performance
an MSB-aligned (MSB-first) serial output format is selected, i.e. a level change at
pin WS indicates the beginning of a new audio sample
the standard I
2
S-bus output format is selected
enables the I
2
S-bus outputs (both serial data outputs plus serial bit clock and word
select) in a format determined by bit I
2
SFORM; the TDA9875A is then an I
2
S-bus
master
the outputs mentioned will be 3-stated, thereby improving the EMC performance
1
I
2
SFORM
0
1
0 (LSB)
I
2
SOUT
0
B4
B3
SYSCLK OUTPUT
FREQUENCY (MHz)
0
0
1
1
0
1
0
1
256f
s
384f
s
512f
s
768f
s
8.192
12.288
16.384
(1)
24.576
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參數(shù)描述
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