參數(shù)資料
型號(hào): TDA7503
廠商: STMICROELECTRONICS
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
文件頁(yè)數(shù): 30/30頁(yè)
文件大?。?/td> 297K
代理商: TDA7503
9/30
TDA7503
Note : All data Pads are Schmitt Trigger Pads. This excludes the 18 power pads and the 2 crystal oscillator pads - pins XTI and XTO.
94
SCLK
I/O
I
200pF
8mA
Microcontroller General Purpose. Each of the six GPIO
lines can be individually configured to be digital input or
output by writing to the P1 and P1DIR registers. All
GPIOs are configured to be inputs with the outputs tri-
stated except for P1.0. This pin is tri-stated while the
RESET pin is held low and is pulled low when RESET is
released. This pin will be pulled high when in IDLE or
PWRDN modes.
95
MOSI
I/O
I
200pF
8mA
Microcontroller SPI Master Output Slave Input Serial
Data . Serial Data Output for SPI type serial port when in
SPI Master Mode and Serial Data Input when in SPI
Slave Mode.
96
MISO
I/O
I
200pF
8mA
Microcontroller SPI Master Input Slave Output Serial
Data . Serial Data Input for SPI style serial port when in
SPI Master Mode and Serial Data Output when in SPI
Slave Mode.
97
RESET
I/O
I
100pF
4mA
System Reset. A logic low level applied to RESET input
initializes the microcontroller. The micro is responsible for
initializing the DSPs. If the watchdog timer overflow
occurs this pin is driven low for 1 watchdog timer cycle.
During Debug Mode if this pin is pulled low in while the
DBRQN line is pulled low then the DSP pointed to by the
DBSEL pin will be reset.
98
VSS3
GND
Power Ground.
99
VDD1
I
VDD
3.3V Power Supply.
100
T1(P3.5)
I/O
I
100pF
4mA
Microcontroller Timer 1 External Input. Input event clock
for timer 1, or GPIO. This pin can also act as GPIO using
the P3 and P3DIR registers.
PIN DESCRIPTION (continued)
N.
Name
Type
Reset
Status
O/P
Load
Buffer
Function
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