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參數(shù)資料
| 型號： | TDA7503 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 2/30頁 |
| 文件大?。?/td> | 297K |
| 代理商： | TDA7503 |
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TDA7503
10/30
All values are valid on the entire operation range unless otherwise specified.
RECOMMENDED DC OPERATING CONDITIONS
CURRENT CONSUMPTION
Note: 42MHz internal DSP clock
PLL CHARACTERISTICS
Note: 1. Depending on VCO output frequency.
2. Fdsp = Fvco/2 when PLL is running
OSCILLATOR CHARACTERISTICS
When PLL is enabled see constraints for Internal Clocks.
DSP and MICRO CLOCKS
INTERNAL CLOCKS
Notes: 1. DF is PLL input devide factor, bits IDF [4:0] of PLL control register one.
2. MF is PLL multiply devide factor, bits MP [6:0] of PLL control register zero.
3. 1 cyc.
P is given for a basic instruction.
4. Fext = External Crystal Oscillator frequency
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
3.3V Power Supply Voltage
3.15
3.3
3.45
V
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Idd
Maximum current
290
325
mA
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Lock Time (note1)
1
3
ms
Fvco
VCO Frequency (note 2)
70
140
MHz
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Fosc
Max Oscillator Frequency (XTI)
8
10.5
12.5
MHz
Symbol
Characteristics
Test Conditions
Min.
Typ.
Max.
Unit
fDSP_MAX
Maximum DSP Internal Operation
Frequency (dclk)
42
MHz
fP_MAX
Maximum
P (MX51) Internal
Operation Frequency (mclk)
21
MHz
Symbol
Characteristics
Test Conditions
Expression
Fdsp
Internal DSP Clock Cycle Frequency (dclk)
fP
Internal
P (MX51) Clock Cycle Frequency (mclk)
Icyc_DSP
DSP Machine Cycle Time
dclk
Icyc_P
P (MX51) Machine Cycle Time
4mclk
MF F
ex t
2DF
------------------------
MF F
ex t
4DF
------------------------
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