
1995 Jul 17
5
Philips Semiconductors
Product specification
Digital audio input/output circuit (DAIO)
TDA1315H
PINNING
SYMBOL
PIN
PADCELL
DESCRIPTION
RC
fil
V
ref
V
DDA
V
SSA
IECIN1
IECIN0
IECSEL
1
2
3
4
5
6
7
E029
E029
E008
E004
E007
IPP04
IUP04
PLL loop filter input
decoupling internal reference voltage output
analog supply voltage
analog ground
high sensitivity IEC input
TTL level IEC input
select IEC input 0 or 1 (0 = IECIN0; 1 = IECIN1); this input has an internal pull-up
resistor
digital audio output for optical and transformer link
digital audio output enable (0 = enabled; 1 = disabled/3-state); this input has an
internal pull-up resistor
enable factory test input (0 = normal application; 1 = scan mode)
enable factory test input (0 = normal application; 1 = observation outputs)
PLL out-of-lock (0 = not locked; 1 = locked); this output can drive an LED
indicates sample frequency = 32 kHz (active LOW); this output can drive an LED
indicates sample frequency = 44.1 kHz (active LOW); this output can drive an LED
indicates sample frequency = 48 kHz (active LOW); this output can drive an LED
use of channel status block (0 = professional use; 1 = consumer use); this output
can drive an LED
digital supply voltage 2
digital ground 2
initialization after power-on, requires only an external capacitor connected to V
DDD
;
this is a Schmitt-trigger input with an internal pull-down resistor
enable power-down input in the standby mode (0 = normal application; 1 = standby
mode)
select microcontroller/stand-alone mode (0 = microcontroller; 1 = stand-alone); this
input has an internal pull-up resistor
microcontroller interface address switch input (0 = 000001; 1 = 000010)
microcontroller interface mode line input
microcontroller interface clock line input
microcontroller interface data line input/output
strobe for control register (active HIGH); this input has an internal pull-down resistor
synchronization for output user data (0 = data available; 1 = no data)
enable factory (scan) test input (0 = normal application; 1 = test clock enable)
copyright status bit (0 = copyright asserted; 1 = no copyright asserted); this output
can drive an LED
validity of audio sample input/output (0 = valid sample; 1 = invalid sample); this pin
has an internal pull-down resistor
pre-emphasis output bit (0 = no pre-emphasis; 1 = pre-emphasis)
audio mute input (0 = permanent mute; 1 = mute on receive error); this pin has an
internal pull-up resistor
IECO
IECOEN
8
9
OPFH3
IUP04
TESTB
TESTC
UNLOCK
FS32
FS44
FS48
CHMODE
10
11
12
13
14
15
16
IPP04
IPP04
OPP41A
OPP41A
OPP41A
OPP41A
OPP41A
V
DDD2
V
SSD2
RESET
17
18
19
E008
E009
IDP09
PD
20
IPP04
CTRLMODE
21
IUP04
LADDR
LMODE
LCLK
LDATA
STROBE
UDAVAIL
TESTA
COPY
22
23
24
25
26
27
28
29
IPP04
IPP09
IPP09
IOF24
IDP04
OPF23
IPP04
OPP41A
INVALID
30
IOD24
DEEM
MUTE
31
32
OPF23
IUP04