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參數(shù)資料
| 型號： | TC58NS256DC |
| 廠商： | Toshiba Corporation |
| 英文描述： | TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 256-MBIT (32M ?8 BITS) CMOS NAND E2PROM (32M BYTE SmartMediaTM) |
| 中文描述： | 馬鞍山暫定東芝數(shù)字集成電路硅柵CMOS 256兆位（32M的？8位）的CMOS NAND型E2PROM的（32兆字節(jié)SmartMediaTM） |
| 文件頁數(shù)： | 2/33頁 |
| 文件大小： | 709K |
| 代理商： | TC58NS256DC |
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TC58NS256DC
2000-08-27 2/33
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Power Supply Voltage
0.6~4.6
V
V
IN
Input Voltage
0.6~4.6
V
V
I/O
Input/Output Voltage
0.6 V~V
CC
+
0.3 V (
≤
4.6 V)
V
P
D
Power Dissipation
0.3
W
T
stg
Storage Temperature
20~65
°C
T
opr
Operating Temperature
0~55
°C
CAPACITANCE
*
(Ta
=
25°C, f
=
1 MHz)
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
C
IN
Input
V
IN
=
0 V
10
pF
C
OUT
Output
V
OUT
=
0 V
10
pF
*
This parameter is periodically sampled and is not tested for every device.
I/O control circuit
Status register
Address register
Command register
Column buffer
Column decoder
Data register
Sense amp
Memory cell array
Control circuit
HV generator
R
Logic control
BY
/
RY
V
CC
I/O1
V
SS
I/O8
~
WP
CE
CLE
ALE
WE
RE
BY
/
RY
R
d
Extended area
(embedded ID)
The products described in this document are subject to the foreign exchange and foreign trade laws.
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
The information contained herein is subject to change without notice.
000707EBA2
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