參數(shù)資料
型號(hào)： TC58FV321
廠商： Toshiba Corporation
英文描述： TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 32-MBIT (4M X 8 BITS / 2M X 16 BITS) CMOS FLASH MEMORY
中文描述： 東芝馬鞍山數(shù)字集成電路硅柵CMOS 32兆位（4米× 8位/ 2米× 16位）的CMOS閃存
文件頁數(shù)： 6/48頁
文件大?。?/td> 560K
代理商： TC58FV321
TC58FVT321/B321FT/XB-70,-10
2002-08-06 6/48
SIMULTANEOUS READ/WRITE OPERATION
The TC58FVT321/B321 features a Simultaneous Read/Write operation. The Simultaneous Read/Write operation
enables the device to simultaneously write data to or erase data from a bank while reading data from another bank.
The TC58FVT321/B321 has a total of nine banks: 1 bank of 0.5 Mbits, 1 bank of 3.5 Mbits and 7 banks of 4 Mbits.
Banks can be switched between using the bank addresses (A20~A15). For a description of bank blocks and addresses,
please refer to the Block Address Table and Block Size Table.
The Simultaneous Read/Write operation cannot perform multiple operations within a single bank. The table below
shows the operation modes in which simultaneous operation can be performed.
Note that during Auto-Program execution or Auto Block Erase operation, the Simultaneous Read/Write operation
cannot read data from addresses in the same bank which have not been selected for operation. Data from these
addresses can be read using the Program Suspend or Erase Suspend function, however.
SIMULTANEOUS READ/WRITE OPERATION
STATUS OF
BANK ON WHICH OPERATION IS BEING
PERFORMED
STATUS OF OTHER BANKS
Read Mode
ID Read Mode
(1)
Auto-Program Mode
Fast Program Mode
(2)
Program Suspend Mode
Auto Block Erase Mode
Auto Multiple Block Erase Mode
(3)
Erase Suspend Mode
Program Suspend during Erase Suspend
CFI Mode
Read Mode
(1) Only Command Mode is valid.
(2) Including
times when Acceleration Mode is in use.
(3) If the selected blocks are spread across all nine banks, simultaneous operation cannot be carried out.
OPERATION MODES
In addition to the Read, Write and Erase Modes, the TC58FVT321/B321 features many functions including block
protection and data polling. When incorporating the device into a deign, please refer to the timing charts and
flowcharts in combination with the description below.
READ MODE
To read data from the memory cell array, set the device to Read Mode. In Read Mode the device can perform
high-speed random access as asynchronous ROM.
The device is automatically set to Read Mode immediately after power-on or on completion of automatic
operation. A software reset releases ID Read Mode and the lock state which the device enters if automatic
operation ends abnormally, and sets the device to Read Mode. A hardware reset terminates operation of the
device and resets it to Read Mode. When reading data without changing the address immediately after power-on,
either input a hardware Reset or change CE from H to L.
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