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參數(shù)資料
| 型號： | TC1130 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 32-Bit Single-Chip Microcontroller |
| 中文描述： | 32位單片機 |
| 文件頁數(shù)： | 5/113頁 |
| 文件大?。?/td> | 1505K |
| 代理商： | TC1130 |
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Data Sheet
1
V0.3, 2003-09
TC1130
32-Bit Single-Chip Microcontroller
TriCore Family
Advance Information
High Performance 32-bit TriCore V1.3 CPU with 4-Stage Pipeline
Floating Point Unit (FPU)
Dual Issue super-scalar implementation
– MAC Instruction maximum triple issue
Circular Buffer and bit-reverse addressing modes for DSP algorithms
Flexible multi-master interrupt system
Very fast interrupt response time
Hardware controlled context switch for task switch and interrupts
Memory Management Unit (MMU)
On-chip Memory
– 32 KByte Data Memory (SPRAM)
– 32 KByte Code Memory (SPRAM)
– 16 KByte Instruction Cache (ICACHE).
– 64KByte SRAM Data Memory Unit (DMU)
– 16 KByte Boot ROM
On-chip Bus Systems
– 64-Bit High Performance Local Memory Bus (LMB) for fast access between caches
and on-local memories and FPI Interface
– On-chip Flexible Peripheral Interconnect Buses (FPI) for interconnections of
functional units
DMA Controller with 8 channels for data transfer operations between peripheral units
and memory locations
– Two high speed Micro Link Interfaces (MLI0/1) for controller communication and
emulation
Flexible External Bus Interface Unit (EBU) to access external data memories
One Multifunctional General Purpose Timer Units (GPTU) with three 32-bit timer/
counters
Two Capture and Compare units (CCU60/1) for PWM signal generation, each with
– 3-channel, 16 bit Capture and Compare unit
– 1-channel, 16 bit Compare unit
Three Asynchronous/Synchronous Serial Channels (ASC0/1/2) with baudrate
generator, parity, framing and overrun error detection, support FIFO and IrDA data
transmission
Two High Speed Synchronous Serial Channels (SSC0/1) with programmable data
length, FIFO support and shift direction
One MultiCAN Module with four CAN nodes and 64 message buffers for high
efficiency data handling
Fast Ethernet Controller with 10/100 Mbps MII-Based physical devices support
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