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參數(shù)資料
| 型號： | TB28F008SA-100 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| 中文描述： | 1M X 8 FLASH 12V PROM, 100 ns, PDSO44 |
| 封裝： | 0.525 X 1.110 INCH, PLASTIC, SOP-44 |
| 文件頁數(shù)： | 26/33頁 |
| 文件大?。?/td> | 466K |
| 代理商： | TB28F008SA-100 |
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28F008SA
AC CHARACTERISTICSDWrite Operations
(1)
Versions
V
CC
g
5%
28F008SA-85
(7)
Unit
V
CC
g
10%
28F008SA-85
(8)
28F008SA-120
(8)
Symbol
Parameter
Notes
Min
Max
Min
Max
Min
Max
t
AVAV
t
WC
Write Cycle Time
85
90
120
ns
t
PHWL
t
PS
RP
Y
High Recovery to
WE
Y
Going Low
2
1
1
1
m
s
t
ELWL
t
CS
CE
Y
Setup to WE
Y
Going
Low
10
10
10
ns
t
WLWH
t
WP
WE
Y
Pulse Width
40
40
40
ns
t
VPWH
t
VPS
V
PP
Setup to WE
Y
Going
High
2
100
100
100
ns
t
AVWH
t
AS
Address Setup to WE
Y
Going High
3
40
40
40
ns
t
DVWH
t
DS
Data Setup to WE
Y
Going
High
4
40
40
40
ns
t
WHDX
t
DH
Data Hold from WE
Y
High
5
5
5
ns
t
WHAX
t
AH
Address Hold from WE
Y
High
5
5
5
ns
t
WHEH
t
CH
CE
Y
Hold from WE
Y
High
10
10
10
ns
t
WHWL
t
WPH
WE
Y
Pulse Width High
30
30
30
ns
t
WHRL
WE
Y
High to RY/BY
Y
Going Low
100
100
100
ns
t
WHQV1
Duration of Byte Write
Operation
5, 6
6
6
6
m
s
t
WHQV2
Duration of Block Erase
Operation
5, 6
0.3
0.3
0.3
sec
t
WHGL
Write Recovery before
Read
0
0
0
m
s
t
QVVL
t
VPH
V
PP
Hold from Valid SRD,
RY/BY
Y
High
2, 6
0
0
0
ns
NOTES:
1. Read timing characteristics during erase and byte write operations are the same as during read-only operations. Refer to
AC Characteristics for Read-Only Operations.
2. Sampled, not 100% tested.
3. Refer to Table 3 for valid A
IN
for byte write or block erasure.
4. Refer to Table 3 for valid D
IN
for byte write or block erasure.
5. The on-chip Write State Machine incorporates all byte write and block erase system functions and overhead of standard
Intel flash memory, including byte program and verify (byte write) and block precondition, precondition verify, erase and
erase verify (block erase).
6. Byte write and block erase durations are measured to completion (SR.7
e
1, RY/BY
Y
e
V
OH
). V
PP
should be held at
V
PPH
until determination of byte write/block erase success (SR.3/4/5
e
0)
7. See High Speed AC Input/Output Reference Waveforms and High Speed AC Testing Load Circuits for testing characteris-
tics.
8. See AC Input/Output Reference Waveforms and AC Testing Load Circuits for testing characteristics.
26
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