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參數(shù)資料
| 型號： | TB28F008SA-100 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| 中文描述： | 1M X 8 FLASH 12V PROM, 100 ns, PDSO44 |
| 封裝： | 0.525 X 1.110 INCH, PLASTIC, SOP-44 |
| 文件頁數(shù)： | 16/33頁 |
| 文件大?。?/td> | 466K |
| 代理商： | TB28F008SA-100 |
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28F008SA
290429–8
Bus
Command
Comments
Operation
Write
Erase
Setup
Data
e
20H
Address
e
Within block to be
erased
Write
Erase
Data
e
D0H
Address
e
Within block to be
erased
Standby/Read
Check RY/BY
Y
V
OH
e
Ready, V
OL
e
Busy
or
Read Status Register
Check SR.7
1
e
Ready, 0
e
Busy
Toggle OE
Y
or CE
Y
to
update Status Register
Repeat for subsequent bytes
Full status check can be done after each block or after a
sequence of blocks
Write FFH after the last block erase operation to reset the
device to Ready Array Mode
FULL STATUS CHECK PROCEDURE
290429–9
Bus
Command
Comments
Operation
Optional
Read
CPU may already have read
Status Register data in WSM
Ready polling above
Standby
Check SR.3
1
e
V
PP
Low Detect
Standby
Check SR.4,5
Both 1
e
Command Sequence
Error
Standby
Check SR.5
1
e
Block Erase Error
SR.3 MUST be cleared, if set during a block erase attempt,
before further attempts are allowed by the Write State
Machine
SR.5 is only cleared by the Clear Status Register
Command, in cases where multiple blocks are erased
before full status is checked.
If error is detected, clear the Status Register before
attempting retry or other error recovery.
Figure 8. Automated Block Erase Flowchart
16
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TB28F008SC-100 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SmartVoltage FlashFile⑩ MEMORY FAMILY 4, 8, AND 16 MBIT |
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| TB28F016SC-110 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SmartVoltage FlashFile⑩ MEMORY FAMILY 4, 8, AND 16 MBIT |
| TB28F200B5B80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT |
| TB28F200B5-B80 | 制造商:Intel 功能描述:NOR Flash, 128K x 16, 44 Pin, Plastic, SOP |
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