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參數(shù)資料
| 型號： | T8531A |
| 元件分類： | Codec |
| 英文描述： | T8531A/8532 Multichannel Programmable Codec Chip Set |
| 中文描述： | T8531A/8532多通道可編程解碼器芯片組 |
| 文件頁數(shù)： | 32/50頁 |
| 文件大?。?/td> | 888K |
| 代理商： | T8531A |
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32
Agere Systems Inc.
Preliminary Data Sheet
September 2001
Codec Chip Set
T8531A/T8532 Multichannel Programmable
Timing Characteristics
(continued)
Table 17. Serial Control Port Timing
(See Figure 10.)
5-4232a (F)
Notes:
UPDI and UPCS change at the rising edge of UPCK by the microprocessor and are sampled at the falling edge of UPCK by the DSP.
UPDO changes at the rising edge of UPCK by the DSP and is sampled at the falling edge of UPCK by the microprocessor.
Figure 10. Timing Diagram for Microprocessor Write/Read to/from the DSP on the Control Interface
Symbol
tCSHLSET
tCSLHHOD
tUPDIST
tUPDIHD
tUPDODEL
tUPDOHZDL
tCKCSH
Parameter
Test Conditions
—
—
—
—
C
L
= 50 pF
C
L
= 50 pF
Min
25
20 ns
25
20
—
—
Typ
—
—
—
—
—
—
Max
—
Unit
ns
—
ns
ns
ns
ns
UPCS to UPCK Setup
UPCS to UPCK Hold
UPDI to UPCK Setup
UPDI to UPCK Hold
UPCK to UPDO Delay
UPCS to UPDO High-Z
Duration of UPCK and UPCS High:
Write Cycle
Read Cycle
Duration of UPCK and UPCS High
UPCK Period/2
—
—
42
34
—
—
—
1
9
9
—
—
—
—
—
—
μ
s
μ
s
μ
s
tCKCSH1
tCSHLSET
tCSLHHOD
tUPDOHZDL
0
13—1
14
15
0
13—1
14
15
tUPDIHD
DATA (16 bits)
tUPDODEL
0
1
13—2
14
15
tUPDIST
tUPDIHD
ADDRESS (16 bits)
UPDI
UPDO
UPCS
UPCK
HIGH-Z STATE
DATA (16 bits)
tCKCSH
ADDRESS
tCKCSH1
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| T8532 | 制造商:AGERE 制造商全稱:AGERE 功能描述:T8531A/8532 Multichannel Programmable Codec Chip Set |
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| T85331G | 制造商:BITECH 制造商全稱:Bi technologies 功能描述:Thick Film Super Low Profile SIP Resistor Networks |
| T85331J | 制造商:BITECH 制造商全稱:Bi technologies 功能描述:Thick Film Super Low Profile SIP Resistor Networks |
| T8534 | 制造商:AGERE 制造商全稱:AGERE 功能描述:T8533/34 Quad Programmable Line Card Signal Processor |
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