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參數(shù)資料
| 型號： | T7295-1 |
| 廠商： | Lineage Power |
| 英文描述： | E3 Integrated Line Receiver(E3 集成線接收器) |
| 中文描述： | 綜合線接收E3展（E3展集成線接收器） |
| 文件頁數(shù)： | 5/14頁 |
| 文件大小： | 321K |
| 代理商： | T7295-1 |
Data Sheet
February 1997
T7295-1 E3 Integrated Line Receiver
5
Lucent Technologies Inc.
Overview
(continued)
External Loop Filter Capacitor
Figure 4 shows the connection to an external 0.1
μ
F
±
20% capacitor at the LPF1/LPF2 pins. This capacitor is part
of the PLL filter. A nonpolarized, low-leakage capacitor should be used.
5-2636(C).ar.1
* Optional, see Receive Path Configuration section.
Figure 4. Receiver Configurations
Table 2. Receive Input Signal Amplitude Requirements
Maximum input amplitude under all conditions is 1.1 V pk.
* The SOJ device performance is enhanced by decreased package parasitics.
Although system designers typically use power in dBm to describe input levels, the T7295-1 responds
to peak input signal amplitude. Therefore, the T7295-1 input signal limits are given in mV pk.
REQB
LOSTHR
Minimum Signal
SOJ
*
80
60
40
80
80
80
Unit
DIP
115
85
60
115
115
115
0
0
mV pk
mV pk
mV pk
mV pk
mV pk
mV pk
V
DD
/2
V
DD
0
V
DD
/2
V
DD
1
0.01 μF
T7295-1
0.01 μF
T7295-1
0 dB—15 dB
0 FOR 6 dB—
1 FOR 0 dB—
TX
FIXED
EQUALIZER
RIN
REQB
1
CASE 2:
75
*
0 dB—15 dB
EXISTING
OFF-CHIP
NETWORKS
0.1 μF
LPF1
LPF2
TX
RIN
0.1 μF
REQB
LPF1
75
CASE 1:
LPF2
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