參數(shù)資料
型號(hào): T4312816B
廠商: TM Technology, Inc.
英文描述: 8M x 16 SDRAM 2M x 16bit x 4Banks Synchronous DRAM
中文描述: 8米× 16 SDRAM的2米x 16Bit的X 4Banks同步DRAM
文件頁(yè)數(shù): 15/70頁(yè)
文件大?。?/td> 688K
代理商: T4312816B
TE
CH
tm
Recommended D.C. Operating Conditions (V
DD
= 3.3V
±
0.3V, T
A
= 0~70
°
C)
Description/Test condition
Operating Current
t
RC
t
RC
(min), Outputs Open
One bank active
Precharge Standby Current in non-power down mode
t
CK
= tck(min), CS#
V
IH
(min), CKE
V
IH
Input signals are changed very 2clks
Precharge Standby Current in non-power down mode
T
CK
=
, CLK
V
IL
(max), CKE
V
IH
Precharge Standby Current in power down mode
t
CK
= tck(min), CKE
V
IL
(max)
Precharge Standby Current in power down mode
T
CK
=
, CKE
V
IL
(max)
Active Standby Current in non-power down mode
t
CK
= tck(min), CKE
V
IH
(min), CS#
V
IH
(min)
Input signals are changed very 2clks
Active Standby Current in non-power down mode
CKE
V
IH
(min), CLK
V
IL
(max), t
CK
=
Operating Current (Burst mode)
t
CK
=t
CK
(min),
Outputs Open, Multi-bank interleave
Refresh Current
t
RC
t
RC
(min)
Normal
Self Refresh Current
V
IH
V
DD
- 0.2, 0V
V
IL
0.2V
Lower Power
T4312816B
TM Technology Inc. reserves the right
P. 15
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
- 6/7
Max.
Symbol
Unit
Note
I
DD1
120/110
3
I
DD2N
20
3
I
DD2NS
10
I
DD2P
2
3
I
DD2PS
2
I
DD3N
30
I
DD3NS
25
I
DD4
150/130
3, 4
I
DD5
210/210
mA
3
2
I
DD6
0.8
mA
Parameter
Description
Min.
Max.
Unit Note
I
IL
Input Leakage Current
( 0V
V
IN
V
DD
, All other pins not under test = 0V )
Output Leakage Current
Output disable, 0V
V
OUT
V
DDQ
)
LVTTL Output "H" Level Voltage
( I
OUT
= -2mA )
LVTTL Output "L" Level Voltage
( I
OUT
= 2mA )
- 1.0
1.0
uA
I
OL
- 1.5
1.5
uA
V
OH
2.4
-
V
V
OL
-
0.4
V
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