參數(shù)資料
型號(hào)： SX8652IWLTRT
廠商： Semtech
文件頁(yè)數(shù)： 6/29頁(yè)
文件大?。?/td> 0K
描述： IC TOUCH SCREEN CTRLR 14DFN
標(biāo)準(zhǔn)包裝： 1
類型： 電阻
觸摸面板接口： 4 線，5 線
輸入數(shù)/鍵： 2 鍵
分辨率（位）： 12 b
數(shù)據(jù)接口： 串行，SPI?
數(shù)據(jù)速率/采樣率 (SPS，BPS)： 74k
電壓基準(zhǔn)： 內(nèi)部
電源電壓： 1.65 V ~ 3.7 V
電流 - 電源： 10mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 14-WFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 14-DFN
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： SX8652IWLDKR
Revision V1.7/October 2010
2010 Semtech Corp.
SX8652
www.semtech.com
Page 14
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
15kV ESD Low Power 4-Wire / 5-Wire Resistive
Touchscreen Controller with SPI Interface
5. 5-wire Touch Screen Detailed Description
5.1. Touch Screen Operation
As the 4-wire, the 5-wire resistive touch screen consists of two resistive
sheets separated by an insulator (Figure 11). The main difference is that
the 4 wires are connected on the 4 corners of the bottom conductive
sheet. They are referred as Top Left, Top Right, Bottom Left, Bottom
Right.
The fifth wire is embedded in the top sheet and is used for sensing the
electrode voltage and is referred as the wiper.
Figure 11. 5-wire touchscreen
5.2. Coordinates Measurement
When the electrodes TL is connected with BL and TR with BR, they form with the linearization pattern 2 electrodes bars
which are very similar to the X electrodes in a 4-wire touchscreen. In the same way, the association of TL with TR and BL
with BR create Y electrodes.
The four corners are therefore able to produce voltage gradients in the horizontal and vertical axis. The wiper is connected
to the high input impedance of the ADC. When a pressure is applied on the top sheet, the contact point split the bottom
sheet resistance into R1 and R2 on the X axis and R3 and R4 on the Y axis.
The X and Y position converted by the 12-bit ADC
gives the following result.
5.3. Pen Detection
The BR pin is connected to the positive pin of the reference voltage through
RPNDT. The wiper panel is grounded at the AUX/WIPER pin to provide the
grounding path for a screen touch event.
The BR pin is monitored to detect voltage drop. When a pressure is applied on
the top surface, a current path is created between the two layers and the
PENIRQ bit of the RegStat register will be set. RPNDT should be set to the
greatest value of 200 kOhm for optimal detection (see Table 15). Increasing
PowDly settings can also improve the detection on panel with high resistance.
In PENDET mode, the pen detection will set NIRQ low.
Figure 12. 5-wire pen detection circuitry
T L
B L
B o tt
o m c
o n d u
c tiv e
s h e e
t
T R
B R
T o p
c o n d
u c tiv
e s h
e e t
W ip e
r
L in
e a r
is a t
io n
p a t
te rn
Xpos
4095
R2
R1
R2
+
--------------------
=
Ypos
4095
R4
R3
R4
+
--------------------
=
BR
R1
Vref
+
-
AUX/
WIPER
-
R PNDT
Sb
Rb
Q
Internal
logic
Bottom
layer
Top
layer
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