參數(shù)資料
型號: SX8652IWLTRT
廠商: Semtech
文件頁數(shù): 5/29頁
文件大小: 0K
描述: IC TOUCH SCREEN CTRLR 14DFN
標準包裝: 1
類型: 電阻
觸摸面板接口: 4 線,5 線
輸入數(shù)/鍵: 2
分辨率(位): 12 b
數(shù)據(jù)接口: 串行,SPI?
數(shù)據(jù)速率/采樣率 (SPS,BPS): 74k
電壓基準: 內(nèi)部
電源電壓: 1.65 V ~ 3.7 V
電流 - 電源: 10mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 14-DFN
包裝: 標準包裝
其它名稱: SX8652IWLDKR
Revision V1.7/October 2010
2010 Semtech Corp.
SX8652
www.semtech.com
Page 13
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
15kV ESD Low Power 4-Wire / 5-Wire Resistive
Touchscreen Controller with SPI Interface
4.3. Pressure Measurement
The 4-wire touchscreen allows pressure measurement. The contact resistance between the two sheets are a function of
the pressure applied on the top sheet. Indeed, the a low pressure applied with the finger will create a small contact area.
With a greater pressure, the contact area will be bigger and the RT resistance smaller.
The RT contact resistance is therefore an indication of the applied pressure. RT is deducted from Z1 and Z2 measurement.
The measurement setup given in Table 7 allows to find Z1 and Z2.
Arranging Z1 and Z2 with Rxtot and Rytot allows the
computation of RT.
An alternative calculation method is using Xpos and Ypos.
Table 7. Measurement setup
4.4. Pen Detection
The pen detection circuitry is used to detect a user action on the
touchscreen. The contact between the two layers generates an interrupt or
starts an acquisition sequence.
Doing a pen detection prior to conversion avoids feeding the host with
dummy data and saves power.
If the touchscreen is powered between X+ and Y- through a resistor RPNDT,
no current will flow so long as pressure is not applied to the surface (see
When a pressure is applied, a current path is created and brings X+ to the
level defined by the resistive divider determined by RPNDT and the sum of
R1, RT and R4.
Figure 10. 4-wire pen detection circuitry
RPNDT should be set to the greatest value of 200 kOhm for optimal detection (see Table 15). Increasing PowDly settings
can also improve the detection on panel with high resistance.
The pen detection will set the PENIRQ bit of the RegStat register. The PENIRQ bit will be cleared and the NIRQ will be de-
asserted as soon as the host reads the status register.
In PENDET mode, the pen detection will set NIRQ low.
Measurement
Vref +
Vref-
ADC +
X
X+
X-
Y+
Y
Y+
Y-
X+
Z1
X+
Y-
Y+
Z2
X+
Y-
X-
z1
4095
R4
R1
R4
R
T
+
---------------------------------
=
z2
4095
R4
Rt
+
R1
R4
R
T
+
---------------------------------
=
R
T
Rytot
Ypos
4095
------------
z2
z1
-----
1
=
R
T
Rytot Y
pos
4095
-------------------------------
4095
z1
------------
1
Rxtot
1
Xpos
4095
-------------
=
X-
X+
R2
R1
Vref
+
-
RT
Y-
Y+
R4
R3
RPNDT
Sb
Rb
IRQ
Q
Internal
logic
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