參數(shù)資料
型號: STR751FR0
廠商: 意法半導(dǎo)體
元件分類: ADC
英文描述: Zener Diode; Application: General; Pd (mW): 400; Vz (V): 29.02 to 30.51; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: MHD
中文描述: 的ARM7TDMI - S⑩32位微控制器的閃存,新措施,3性病16位定時器,PWM定時器,快速的10位ADC和I2C,UART的,過磷酸鈣,USB和CAN
文件頁數(shù): 70/84頁
文件大?。?/td> 997K
代理商: STR751FR0
Electrical parameters
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
72/84
5.3.12
10-bit ADC characteristics
Subject to general operating conditions for VDDA_ADC, fPCLK, and TA unless otherwise
specified.
Table 45.
10-bit ADC characteristics
Symbol
Parameter
Conditions
Min
Typ(1)
1.
Unless otherwise specified, typical data are based on TA=25°C. They are given only as design guidelines
and are not tested.
Max
Unit
fADC
ADC clock frequency
0.4
8
MHz
VAIN
Conversion voltage range(2)
2.
Calibration is needed once after each power-up.
VSSA_ADC
VDDA_ADC
V
RAIN
External input impedance(3)(4)
3.
CPARASITIC represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus
the pad capacitance (3 pF). A high CPARASITIC value will downgrade conversion accuracy. To remedy this,
fADC should be reduced.
4.
Depending on the input signal variation (fAIN), CAIN can be increased for stabilization time and reduced to
allow the use of a larger serial resistor (RAIN). It is valid for all fADC frequencies ≤ 8 MHz.
10
k
CAIN
External capacitor on analog
input(3)(4)
6.8
pF
Ilkg
Induced input leakage current
+400 A injected
on any pin
1
A
-400 A injected
on any pin
except specific
adjacent pins in
Table 46
1
A
-400A injected
on specific
adjacent pins in
Table 46
40
A
CADC
Internal sample and hold
capacitor
3.5
pF
tCAL
Calibration Time
fCK_ADC=8 MHz
725.25
s
5802
1/fADC
tCONV
Total Conversion time
(including sampling time)
fCK_ADC=8 MHz
3.75
s
30 (11 for sampling + 19 for
Successive Approximation)
1/fADC
IADC
Sunk on
VDDA_ADC
3.7
mA
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