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參數(shù)資料
| 型號： | STM1404CRNCQ6F |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, QCC16 |
| 封裝： | 3 X 3 MM, ROHS COMPLIANT, QFN-16 |
| 文件頁數(shù)： | 4/35頁 |
| 文件大?。?/td> | 366K |
| 代理商： | STM1404CRNCQ6F |
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Pin descriptions
STM1404
If a security alarm (SAL) is issued on tamper, then the state of the Vccsw pin is as follows:
1.
STM1404A (VOUT remains ON when SAL is active-low): Vccsw pin will continue to
operate in normal mode;
2.
STM1404B (VOUT is taken to High-Z when SAL is active-low): Vccsw pin will be set to
high when this occurs; and
3.
STM1404C (VOUT is driven to ground when SAL is active-low): Vccsw pin will be set to
high when this occurs.
2.4
BLD, VBAT low voltage detect output (open drain)
This is an internally loaded test of the battery, activated only during a power-up sequence to
insure that the battery is good either prior to or after encapsulation of the module. There are
three customer options for VDET:
●
2.3 V (2.5 V – external diode drop of about 0.2 V) for a 3 V lithium cell
●
2.5 V (2.7 V – 0.2 V) for a 3 V lithium cell or
●
3.2 V (3.4 V – 0.2 V) for a 3.68 V lithium “AA” battery
This output pin will go active-low when it detects a voltage on the VBAT pin below VDET. BLD
will be released when VCC drops below VRST.
2.5
Active-low RST output (open drain)
Goes low and stays low when VCC drops below VRST (Reset Threshold selected by the
customer), or when MR is logic low. It remains low for trec (200ms, typical) AFTER VCC rises
above VRST and MR goes from low to high.
2.6
MR, manual reset input
A logic low on MR asserts the RST output. The RST output remains asserted as long as MR
is low and for trec after MR returns to high. This active low input has an internal 40 kΩ
(typical) pull-up resistor. It can be driven from a TTL or CMOS logic line or shorted to ground
with a switch. Leave it open if unused.
2.7
PFO, power-fail output (open drain)
When PFI is less than VPFI (power-fail input threshold voltage) or VCC falls below VSW
(battery switchover threshold ~ 2.4 V), PFO goes low, otherwise, PFO remains high. Leave
this pin open if unused.
2.8
PFI, power-fail input
When PFI is less than VPFI, or when VCC falls below VSW (see PFO, above), PFO goes
active-low. If this function is unused, connect this pin to VSS.
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