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STD150
5-8
Samsung ASIC
SPSRAM_HD
High-Density Single-Port Synchronous Static RAM
Parameter Description
SPSRAM_HD is the compiler that automatically generates symbol, netlist, timing model, power model and
layout according to the following parameters; Number of words(w), Number of bit per word(b) and Column
mux(y).
Pin Descriptions
Pin Capacitance
CK
11.80
Unit: [SL]
DOUT
12.10
NOTE:
Each pin’s capacitance is exactly same regardless of available mux types.
Parameters
Ymux(y) = 4
32
2048
16
1
128
1
Ymux(y) = 8
64
4096
32
1
64
1
Ymux(y) = 16
128
8192
64
1
32
1
Ymux(y) = 32
256
16384
128
1
16
1
Words (w)
Min
Max
Step
Min
Max
Step
Bpw (b)
Name
CK
Type
Description
Clock
Clock input. CSN, WEN, A[] and DI[] are latched into the RAM on the rising edge
of CK. If CSN and WEN are low on the rising edge of CK, the RAM is in write
mode. If WEN is high on the rising edge of CK, the RAM is in read mode. Upon
the falling edge of CK, the RAM is in a precharge state.
Chip Enable Chip Enable input. The chip enable is active-low and is latched into the RAM on
the rising edge of CK. When CSN is low, the RAM is enabled for reading or writ-
ing, depending on the state of WEN. When CSN is high, the RAM goes to the
standby mode and is disabled for reading or writing. DOUT remains previous
data output.
Read/Write
Enable
rising edge of CK. When WEN is low, data are written to the addressed location
and DOUT remains stable. When WEN is high, data from the addressed word
are present at DOUT.
Data Out-
put Enable
regardless of any inputs. When OEN is high, DOUT is disabled and goes to
high-impedance state.
Address
Address input bus. The address is latched into the RAM on the rising edge of
CK.
Data Input
Data input bus. Data are latched on the rising edge of CK. Data input is written
into the addressed location in write mode.
Data Output
Data output bus. Data output is valid after the rising edge of CK while the RAM is
in read mode. Data output remains previous data output while the RAM is in write
mode.
CSN
WEN
Read or write enable input. The read/write enable is latched into the RAM on the
OEN
Data output enable input. The data output enable is asynchronously operated
A []
DI []
DOUT []
CSN
5.90
WEN
7.60
OEN
8.40
A
DI
3.60
5.70