
STD130
5-230
Samsung ASIC
SPARAMBW_LP
Low-Power Single-Port Asynchronous Static RAM with Bit-Write
Application Notes
1.
Permitting over-the-cell routing.
In chip-level layout, over-the-cell routing in SPARAMBW_LP is permitted for both Metal-5 and Metal-6
layers.
2.
Incoming power bus should be adjusted to guarantee NOT more than 10% voltage drop at typical-case
current levels.
3.
Power stripe should be tapped from both sides of SPARAMBW_LP.
4.
Avoiding short transition on the address bus.
In SPARAMBW_LP, rather than the write operation which is synchronously performed by WEN signal,
the read operation is asynchronously performed whenever the address transition is occurred. In this
case, if the short transition on the address, called a skew, is happened, since SPARAMBW_LP
recognizes the short address transition as the stable address transition and do perform a read
operation. At that time, while in the read operation, the data stored in the memory may be corrupted due
to the short transition. To prevent such fail, the stable address cycle time (tcyc) is required. The essential
requirement to recognize valid address transition is that at least minimum address period should be
equal or greater than tacc (access time).
5.
A byte-write or word-write operation with SPARAMBW_LP.
Refer to the function table. In byte-write operation, the number of BWEN[] signal bus should be divided
by a byte (8) and eight BWEN signals should be tied to a connection wire. In this case, DI[] bus is
controlled by a byte-wired BWEN signal instead of each BWEN bit. In word-write operation, the
functionality is exactly same as SPARAM_LP. If all of BWEN[] signal is tied to low state, DI[] bus is
only controlled by WEN.
6.
Power reduction during standby mode.
The standby power is measured on the condition that only CSN is disable mode and other signals are in
operation mode except that OEN is tied to low. If any of signals are activated while in standby mode, the
power will be consumed because the input switching activities are occurred by the signal transition.
Therefore, to reduce unnecessary power consumption, you should keep stable for all signals while in
standby mode.