參數(shù)資料
型號(hào)： ST7FLITE09Y0B3
廠商： STMICROELECTRONICS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP16
封裝： 0.300 INCH, PLASTIC, DIP-16
文件頁(yè)數(shù)： 34/115頁(yè)
文件大?。?/td> 781K
代理商： ST7FLITE09Y0B3
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ST7FLITE0
25/115
RESET SEQUENCE MANAGER (Cont’d)
7.4.2 Asynchronous External RESET pin
The RESET pin is both an input and an open-drain
output with integrated RON weak pull-up resistor.
This pull-up has no fixed value but varies in ac-
cordance with the input voltage. It can be pulled
low by external circuitry to reset the device. See
electrical characteristics section for more details.
A RESET signal originating from an external
source must have a duration of at least th(RSTL)in in
order to be recognized. This detection is asynchro-
nous and therefore the MCU can enter reset state
even in HALT mode.
The RESET pin is an asynchronous signal which
plays a major role in EMS performance. In a noisy
environment, it is recommended to follow the
guidelines mentioned in the electrical characteris-
tics section.
If the external RESET pulse is shorter than
tw(RSTL)out (see short ext. Reset in Figure 15), the
signal on the RESET pin will be stretched by a de-
lay generated by the pulse generator. Otherwise
the delay will not be applied (see long ext. Reset in
Figure 15).
Starting from the external RESET pulse recogni-
tion, the device RESET pin acts as an output that
is pulled low during at least tw(RSTL)out.
7.4.3 Internal Low Voltage Detection RESET
Two different RESET sequences caused by the in-
ternal LVD circuitry can be distinguished:
s
Power-On RESET
s
Voltage Drop RESET
The device RESET pin acts as an output that is
pulled low when VDD<VIT+ (rising edge) or
VDD<VIT- (falling edge) as shown in Figure 15.
The LVD filters spikes on VDD larger than tg(VDD) to
avoid parasitic resets.
7.4.4 Internal Watchdog RESET
The RESET sequence generated by a internal
Watchdog counter overflow is shown in Figure 15.
Starting from the Watchdog counter underflow, the
device RESET pin acts as an output that is pulled
low during at least tw(RSTL)out.
Figure 15. RESET Sequences
VDD
RUN
RESET PIN
EXTERNAL
WATCHDOG
ACTIVE PHASE
VIT+(LVD)
VIT-(LVD)
th(RSTL)in
tw(RSTL)out
RUN
th(RSTL)in
ACTIVE
WATCHDOG UNDERFLOW
tw(RSTL)out
RUN
RESET
SOURCE
SHORT EXT.
RESET
LVD
RESET
LONG EXT.
RESET
WATCHDOG
RESET
INTERNAL RESET (256 TCPU)
VECTOR FETCH
tw(RSTL)out
PHASE
ACTIVE
PHASE
ACTIVE
PHASE
DELAY
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST7FLITE09Y0B6 功能描述:8位微控制器 -MCU Flash 1.5K SPI Intrf RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST7FLITE09Y0B6 制造商:STMicroelectronics 功能描述:IC 8BIT FLASH MCU 7FLITE09 DIP16
ST7FLITE09Y0B6TR 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, timers, SPI
ST7FLITE09Y0M3 功能描述:8位微控制器 -MCU Flash 1.5K SPI Intrf RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST7FLITE09Y0M6 功能描述:8位微控制器 -MCU Flash 1.5K SPI Intrf RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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