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| 型號： | ST75C540FP-A |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | SUPER INTEGRATED DEVICESWITH DSP, AFE & MEMORIES FORTELEPHONY,MODEM, FAXOVERINTERNET& POTSLINES |
| 中文描述： | 超級綜合DEVICESWITH數(shù)字信號處理器，模擬前端 |
| 文件頁數(shù)： | 71/84頁 |
| 文件大小： | 599K |
| 代理商： | ST75C540FP-A |
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Establishthe reception(see Figure 39).
Figure 39
XII - RECEIVINGIN PARALLEL MODE
(continued)
CONF 0F 08 00 01
SYNC1
No
Yes
STA_109 = 1
FORM 00 (opt)
Select V.29 9600bps
Arm V.29 receiver
Wait until V.29
carrier detected
Format synchronous
Clear the first
buffers #0 and #1
In case of lostof carrier
while in data mode
CLEAR FIRST BUFFER
WRITE 00 INTO DTRBFS0
WRITE 00 INTO DTRBFS1
SELECT NEXT BUFFER
IBUF = 0
ENABLE IT3
ITMASK = 0 x 88
RET
Subroutine :
CLEAR FIRST BUFFER
No
Yes
STA_109 = 0
7
Notes : 1. At that step the host can check that the corresponding
DTRBSx
buffer is full(different from $00),otherwise itis
an error.
2. This means read
BUFF_LENG
bytes, insidethe Receive
buffer
DTRBFx
starting from location
DTRBFx[0]
to
DTRBFx[BUFF_LENG - 1]
. In synchronous mode, the
BUFF_LENG
isalways 8bytes, exceptwhena
STA_109
lost appears in themiddle of the buffer.
RETURN
No
Yes
IBUF = 1
READ DTRBS1
EXTRACT BUFF_LENG
IBUF = 0
EXECUTE_IT_RECEIVE
READ DTRBF1DATA
BUFF_LENGTIMES(2)
WRITE00 INTODTRBS1
READDTRBS0
EXTRACTBUFF_LENG
IBUF= 1
READ DTRBF0 DATA
BUFF_LENGTIMES (2)
WRITE00 INTO DTRBS0
(1)
(1)
7
Figure 40
These flowcharts show one CPU variable labeled
IBUF which is necessaryfor the understandingof
themechanism, but thereare differentmannersto
implement it.
- IBUF: thisis thenumberoftheDUALRAMbuffer
currentlyinuse bytheHostprocessor.It startswit
0 an then alternates1, 0, 1, 0, ...
The received bits are read by an interrupt routine
(SeeFigure 40).
XII.4- ErrorDetection
Error occurs when the ST75C530/540 has re-
ceivedsomebitsandthatthebuffer
DTRBSx
isnot
empty, this condition is called “Overflow”.
This error is signaled in the bit
ERR_RX
of the
SYSERR
byte, and generates an interrupt
IT0
.To
cleartheerrora
CSE02
commandmustbe issued.
An Overflow conditionoccurs when :
- In synchronous mode: the host processor “for-
gets” to empty the current
DTRBSx
buffer.
- In HDLC mode: when, while inside a frame, the
host processors “forgets” to empty the current
DTRBSx
buffer.
- In UART mode, this cannot happen.
When an Overflow conditionoccurs the host must
restartthe whole parallelinitialisation.
ST75C530- ST75C540
71/84
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