參數(shù)資料
型號(hào)： ST75C540FP-A
廠商： 意法半導(dǎo)體
英文描述： SUPER INTEGRATED DEVICESWITH DSP, AFE & MEMORIES FORTELEPHONY,MODEM, FAXOVERINTERNET& POTSLINES
中文描述： 超級(jí)綜合DEVICESWITH數(shù)字信號(hào)處理器，模擬前端
文件頁(yè)數(shù)： 21/84頁(yè)
文件大小： 599K
代理商： ST75C540FP-A
VI- USER INTERFACE
VI.1- Dual PortRam Description
The dual port RAM is the standard interface be-
tween the host controller and the ST75C530/540,
for either commands or data. This memory is ad-
dressedthrough a7-bitaddressbus.Thelocations
from $00 to $3F are RAM location,while locations
from $40 to $60 are control registers dedicated to
the interrupt handling and the general IO portand
Relay output.
Severalfunctionalareasaredefinedinthedualport
RAM mapping :
- the command area,
- the report area,
- the status area,
- the optionalstatus area,
- the data buffer area,
- the interrupt control area,
- the generalI/Oand Relay Output area.
VI.1.1- Mapping
VI.1.1.1- CommandArea
The command area is located from $00 to $04.
Address $00 holds the command byte COMSYS,
and the next four locations hold the parameters
COMPAR[0..3].Thecommandparametersmustbe
enteredbeforethe commandword is issued. Once
thecommandhasbeenentered,thecommandbyte
isresetandanacknowledgereportisissued.Anew
commandshouldnotbe issuedbeforetheacknow-
ledgecounterCOMACKis incremented.
VI.1.1.2- Report Area
The report area is located from address $05 to
address$07.Location $05holds theacknowledge
counter COMACK. Each time a command is ac-
knowledged, the report bytes COMREP[0..1] (if
any) are written by the ST75C530/540 into loca-
tions$06 and $07, and the content of COMACK is
incremented. This
ST75C530/540 to accurately monitor the com-
mand processing.
counter allows
the
VI.1.1.3- StatusArea
Thestatusareaislocatedfromaddress$08to $0B.
TheerrorstatuswordSYSERRislocatedat address
$08.Thiserrorstatusword isupdatedeachtimean
error condition occurs. An optionalinterruptionIT0
mayadditionallybe triggeredin the caseof anerror
condition. Locations$09 and $0Ahold the general
statusbytesSTATUS[0..1].Themeaningofthebits
dependsonthemodeof operation,andisdescribed
inChapter VIII.Thethirdbyteat address$0Bholds
theQualityMonitorbyte STAQUA.
VI.1.1.4- OptionalStatus Area
The user can program (through the DOSR com-
mand) the four locations STAOPT[0..3]of the Op-
tional Status Area ($0C to $0F) for the real time
monitoring of four arbitrary memory locations.
VI.1.1.5- Data Buffer Area
The data area is made of four 8-byte buffers
(see ParagraphVI.1.3 “Host InterfaceSummary”).
Two are dedicated to transmission and the two
others to reception. Each of the four buffers is
attachedto astatusbyte.the meaningof thestatus
byte depends on the selected format of transmis-
sion. Within each buffer,D0 representsthe firstbit
in time.
VI.1.1.6- VOCODERBufferArea
(VOCODERMode)
Thisareais madeofa 18+2bytebuffer.Thisbuffer
contains the VOCODER frame. The first 18 bytes
VOCDATAcontain the coded frame and the other
2 bytes VOCCORR the Error corrections bit (only
valid in low bit rate mode).
In theReceiveMode (CODER)the ST75C530/540
codesthe received samplesand writesthe corres-
pondingbytes in the buffer.If thelow bit ratemode
is selected,theST75C530/540computesthe Error
corrections 2 bytes and writes them in the buffer.
In the Transmit Mode (DECODER) the
ST75C530/540reads the 18 codedbytesdecodes
them and sendsthe signaltothe analogoutput.In
the low bit rate mode if the Error Correction is
enabled, prior the decoding, the ST75C530/540
reads the 2 Error Correction Bytes and, if any,
correctsthe first 18 bytes.
A mechanism of flags to share the buffer access
betweentheST75C530/540andthehostcontroller
is controlledby the VOCSTAbyte :
- In CODER mode, when the ST75C530/540 has
finis-hed writing the VOCDATA and VOCCORR
bytes, it writes $14 in VOCSTAand generate an
InterruptIT1. The host must readthe Databuffer
thenclear the VOCSTAbyte.
- In DECODER mode, the host must feed the
VOCDATAand, optionaly,the VOCCORRbytes,
then write $14 (if low bit rate) or$12 (if ADPCM)
in VOCSTA. The ST75C530/540 will read the
VOCDATA and VOCCORR bytes, clear the
VOCSTA and generate an Interrupt IT1. A si-
lence frame can be generated, in either low bit
rate or ADPCM mode, by writing 00 in all the
VOCDATAbuffer,including the Error Correction
Bytes VOCCORR.
ST75C530- ST75C540
21/84
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