參數(shù)資料
型號： ST75C530FP-A
廠商： 意法半導體
英文描述： SUPER INTEGRATED DEVICESWITH DSP, AFE & MEMORIES FORTELEPHONY,MODEM, FAXOVERINTERNET& POTSLINES
中文描述： 超級綜合DEVICESWITH數(shù)字信號處理器，模擬前端
文件頁數(shù)： 76/84頁
文件大小： 599K
代理商： ST75C530FP-A
XIV- TRANSPARENT MODE DATA EXCHANGE
The mode uses the DPR locations to exchange
samplesbetweenthe hostand the AFE’s.Toallow
maximum interrupt latency, the DSPuses internal
buffers to store samples and updates the DPR
buffers when internal buffers are ready.The DPR
buffersarebidirectional,thusdoublingthe effective
DPR capacity.
The transfermechanism is depicted below :
1. At baud rate (every 4 samples at 9.6kHz), the
DSP transfers4 samplesfrom the Modem AFE
to theinternalreceivebuffer,aftersendingthem
throughahigh-passfilterwitha transferfunction
H(z) = (z-1)/ (z-0.875) used to remove all DC
components from the signal, and transfers
4samplesfromtheInternaltransmitbuffertothe
Modem AFE. This comes from the currently
implemented internal scheduling. The same
operationis performedfor the voice AFE.
2. After 3 bauds, the internal receive buffer is full
(the internal transmit buffer is also empty), the
DPR buffer is copied to the internal transmit
buffer, then the internal receive buffer is copied
intotheDPR.
3. Ahost interrupt is generated: during servicing,
the host reads the DPR sample buffer then
writesit with new transmitted samples.
XIV.1- Samplebuffers
The mode uses the DPR locations to exchange
samplesbetweenthehostand theAFE’s; sinceno
data transfer (HDLC, UART) occurs in this mode,
the full 0x10 .. 0x3F DPR locations are available.
The Modem sample buffer (MODEMDPR) uses
locations 0x10 to 0x27 (24 bytes) to exchange
12 MAFE samples. The audio sample buffer
(AUDIODPR) uses locations 0x28 to 0x3F to ex-
change 12 VAFE samples. Samples are repre-
sented in 16-bit linear data format, byte order is
little-Endian(Intel-like,LSByteat lowaddress),and
consecutive locations correspond to consecutive
samples in time. Example : locations(0x10, 0x11)
correspond to the first sample (LSB, MSB) re-
ceivedfrom the line AFE.
XIV.2- Interrupts
The DSPsignal events to the host using the inter-
rupt mailbox (ITREST[0..6], ITMASK, ITSRCR).
IT2 is set by the DSP whenever the DPR buffers
are ready. This interrupt source can be masked
through ITMASK, and acknowledged using
ITSRCR[0..6]. The host interrupt service routine
shouldread receivedsamplesfrom the DPR,write
transmitted samples to the DPR, then acknow-
ledgeby clearingtheIT2flag.Theinterruptlatency
is approximately equal to the interrupt period, i.e.
T = 1/800= 1.25ms.Overrunand underruncondi-
tions may occur if the host interrupt latency ex-
ceeds the previous value. Since this situation is
unrecoverable, no specific action is taken.Never-
theless, for debug purposes the user can detect
thisconditionby probingtheinterruptline(SINTR),
andtriggeron a pulsewidth greaterthanthe maxi-
mum allowed latency.
ST75C530 - ST75C540
76/84
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