參數(shù)資料
型號(hào): ST75C530FP-A
廠商: 意法半導(dǎo)體
英文描述: SUPER INTEGRATED DEVICESWITH DSP, AFE & MEMORIES FORTELEPHONY,MODEM, FAXOVERINTERNET& POTSLINES
中文描述: 超級(jí)綜合DEVICESWITH數(shù)字信號(hào)處理器,模擬前端
文件頁數(shù): 70/84頁
文件大?。?/td> 599K
代理商: ST75C530FP-A
XII - RECEIVINGIN PARALLEL MODE
Figure 37
XII.1- Description
When the STA_109 (CD) signal goes on, the
ST75C530/540 will write received data into the
DUALRAM buffer DTRBS0 at first.
XII.1.1- Initialization
The host processor must enable the IT3 receive
interrupt first.
Thenit mustemptythe two DTRBS0 andDTRBS1
registersby writting$00 at theselocations.
As soonas thefirst IT3 interruptappears, the host
must proceedwith the DTRBS0 buffer.
XII.1.2- Lossof Carrier
Each time a loss of carrier appears the
ST75C530/540 stops updating the Data buffer. If
the carrier reappers the host must proceed again
withthe initialisationsequence.
XII.1.3- FSKSynchronization
The FSK Full Duplex demodulator uses an algo-
rithm based on the transitionsof the received sig-
nal. The synchronization mechanism is adjusted
with each signal transiton in order to sample the
demodulated signal at the middle of the bit
(seeFigure 37).
XII.2- ModemFlow Chart
When in parallel data mode, each time the
ST75C530/540 has receive some bit of data it
executesthe following routine(see Figure38).
Wherex start withthe value 0 andtogglebetween
1 and 0.
DEMODULATED
SIGNAL
SAMPLETIME
RECEIVEBIT
0
1
0
0
1
0
0
1
0
1
7
No
Yes
BEGIN
WRITE BIT IN
INTERNAL BUFFER
INTERNAL BUFFER
FULL
SELECT NEXT DUAL
RAM BUFFER X
No
Yes
DTRBSx = 0
MOVE DATA FROM INTERNAL
BUFFER TO DTRBFx
WRITE DTRBSx
RAISE IT3 INTERRUPT
RETURN
RETURN
SIGNAL ERROR
INTO ERR_Rx
RAISE IT0 INTERRUPT
SELECT DUAL
RAM BUFFER x = 0
RETURN
7
Figure 38
XII.3- Host Flow Chart
Hereafter are flowchartsto :
- Establisha V.29reception.
- Receive synchronous data. This task is per-
formed under interrupt.
- Handle properlysome temporary loss of carrier.
ST75C530 - ST75C540
70/84
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