參數(shù)資料
型號(hào)： ST72T2311R6T7
廠商： 意法半導(dǎo)體
英文描述： 8-BIT MCU WITH NESTED INTERRUPTS, EEPROM, ADC, 16-BIT TIMERS, 8-BIT PWM ART, SPI, SCI, CAN INTERFACES
中文描述： 8位嵌套中斷，EEPROM存儲(chǔ)器，模數(shù)轉(zhuǎn)換器，16位定時(shí)器，8位PWM藝術(shù)，SPI和脊髓損傷，微控制器的CAN接口
文件頁數(shù)： 130/164頁
文件大?。?/td> 1043K
代理商： ST72T2311R6T7
ST72311R, ST72511R, ST72512R, ST72532R
68/164
16-BIT TIMER (Cont’d)
Notes:
1. After a processor write cycle to the OC
iHR reg-
ister, the output compare function is inhibited
until the OC
iLR register is also written.
2. If the OC
iE bit is not set, the OCMPi pin is a
general I/O port and the OLVL
i bit will not
appear when a match is found but an interrupt
could be generated if the OCIE bit is set.
3. When the timer clock is fCPU/2, OCFi and
OCMP
i are set while the counter value equals
the OC
iR register value (see Figure 42 on page
68). This behaviour is the same in OPM or
PWM mode.
When the timer clock is fCPU/4, fCPU/8 or in
external clock mode, OCF
i and OCMPi are set
while the counter value equals the OC
iR regis-
ter value plus 1 (see Figure 43 on page 68).
4. The output compare functions can be used both
for generating external events on the OCMP
i
pins even if the input capture mode is also
used.
5. The value in the 16-bit OCiR register and the
OLV
i bit should be changed after each suc-
cessful comparison in order to control an output
waveform or establish a new elapsed timeout.
Forced Compare Output capability
When the FOLV
i bit is set by software, the OLVLi
bit is copied to the OCMP
i pin. The OLVi bit has to
be toggled in order to toggle the OCMP
i pin when
it is enabled (OC
iE bit=1). The OCFi bit is then not
set by hardware, and thus no interrupt request is
generated.
FOLVL
i bits have no effect in both one pulse mode
and PWM mode.
Figure 41. Output Compare Block Diagram
OUTPUT COMPARE
16-bit
CIRCUIT
OC1R Register
16 BIT FREE RUNNING
COUNTER
OC1E
CC0
CC1
OC2E
OLVL1
OLVL2
OCIE
(Control Register 1) CR1
(Control Register 2) CR2
0
OCF2
OCF1
(Status Register) SR
16-bit
OCMP1
OCMP2
Latch
1
Latch
2
OC2R Register
Pin
FOLV2 FOLV1
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