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ST16C580
12
Rev. 1.22
Divide
by
1 logic
XTAL1
XTAL2
Divide
by
4 logic
Clock
Oscillator
Logic
Baudrate
Generator
Logic
-BAUDOUT
MCR
Bit-7=0
MCR
Bit-7=1
Crystal oscillator or External clock 1X / 4X selection
DLM (MSB) and DLL (LSB) provides a user capability for
selecting the desired final baud rate. The example in
Table 4 below, shows the two selectable baud rate
tables available when using a 7.3728 MHz crystal.
Table 4, BAUD RATE GENERATOR PROGRAMMING TABLE (7.3728 MHz CLOCK):
Output
User
DLM
DLL
Baud Rate
16 x Clock
Program
MCR
Divisor
Value
BIT-7=1
Bit-7=0
(Decimal)
(HEX)
50
200
2304
900
09
00
75
300
1536
600
06
00
150
600
768
300
03
00
300
1200
384
180
01
80
600
2400
192
C0
00
C0
1200
4800
96
60
00
60
2400
9600
48
30
00
30
4800
19.2K
24
18
00
18
7200
28.8K
16
10
00
10
9600
38.4k
12
0C
00
0C
19.2k
76.8k
6
06
00
06
38.4k
153.6k
3
03
00
03
57.6k
230.4k
2
02
00
02
115.2k
460.8k
1
01
00
01