- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1970 > ST16C580IQ48-F (Exar Corporation)IC UART FIFO 16B 48TQFP PDF資料下載
參數(shù)資料
| 型號： | ST16C580IQ48-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 34/39頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 16B 48TQFP |
| 標準包裝： | 250 |
| 特點： | * |
| 通道數(shù)： | 1，UART |
| FIFO's： | 16 字節(jié) |
| 電源電壓： | 2.97 V ~ 5.5 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP |
| 供應商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當前第34頁第35頁第36頁第37頁第38頁第39頁
ST16C580
4
Rev. 1.22
-IOR
19
I
Read strobe (active low strobe). A logic 0 on this pin transfers
the contents of the 580 data bus to the CPU.
-IOW
16
I
Write strobe (active low strobe) - A logic 0 on this pin transfers
the contents of the CPU data bus to the addressed internal
register.
INT
30
O
Interrupt Request.
-RXRDY
29
O
Receive Ready. A logic 0 indicates receive data ready status,
i.e. the RHR is full or the FIFO has one or more RX characters
available for unloading. This pin goes to a logic 0 when the
FIFO/RHR is full or when there are more characters available
in either the FIFO or RHR.
-TXRDY
23
O
Transmit Ready. Buffer ready status is indicated by a logic
0, i.e., at least one location is empty and available in the
FIFO or THR. This pin goes to a logic 1 when there are no
more empty locations in the FIFO or THR.
-BAUDOUT
12
O
Baud Rate Generator Output. This pin provides the 16X clock
of the selected data rate from the baud rate generator. The
RCLK pin must be connected externally to -BAUDOUT when
the receiver is operating at the same data rate.
-DDIS
22
O
Drive Disable. This pin goes to a logic 0 when the external
CPU is reading data from the 580. This signal can be used
to disable external transceivers or other logic functions.
-OP1
34
O
Output-1 (User Defined) - See bit-2 of modem control register
(MCR bit-2).
-OP2
31
O
Output-2 (User Defined). This pin provides the user a general
purpose output. See bit-3 modem control register (MCR bit-
3).
RCLK
5
I
Receive Clock Input. This pin is used as external 16X clock
input to the receiver section. External connection to -
Baudout pin is required in order to utilize the internal baud
rate generator.
SYMBOL DESCRIPTION
Symbol
Pin
Signal
Pin Description
48
type
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C650AIJ44-F | IC UART FIFO 32B 44PLCC |
| ST16C654DIQ64-F | IC UART FIFO 64B QUAD 64LQFP |
| ST78C34CJ44-F | IC UART FIFO 83B 44PLCC |
| ST78C36ACJ44-F | IC UART FIFO 16B 44PLCC |
| SW06GSZ-REEL | IC SWITCH QUAD SPST 16SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C650 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.90V TO 5.5V UART WITH 32-BYTE FIFO |
| ST16C650A | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.90V TO 5.5V UART WITH 32-BYTE FIFO |
| ST16C650A_0508 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.90V TO 5.5V UART WITH 32-BYTE FIFO |
| ST16C650A_09 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.90V TO 5.5V UART WITH 32-BYTE FIFO |
| ST16C650ACJ44 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。