參數(shù)資料
型號: ST16C580IQ48-F
廠商: Exar Corporation
文件頁數(shù): 23/39頁
文件大?。?/td> 0K
描述: IC UART FIFO 16B 48TQFP
標準包裝: 250
特點: *
通道數(shù): 1,UART
FIFO's: 16 字節(jié)
電源電壓: 2.97 V ~ 5.5 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
ST16C580
3
Rev. 1.22
SYMBOL DESCRIPTION
A0
28
I
Address-0 Select Bit - Internal registers address selection.
A1
27
I
Address-1 Select Bit Internal registers address selection.
A2
26
I
Address-2 Select Bit Internal registers address selection.
IOR
20
I
Read strobe. Its function is the same as -IOR (see -IOR),
except it is active high. Either an active -IOR or IOR is
required to transfer data from 580 to CPU during a read
operation.
CS0
9
I
Chip Select-0. A logical 1 on this pin provides the chip select
0 function.
CS1
10
I
Chip Select-1. A logical 1 on this pin provides the chip select
1 function.
-CS2
11
I
Chip Select -2. A logical 0 on this pin provides the chip select
2 function.
IOW
17
I
Write strobe. A logic 1 transition creates a write strobe. Its
function is the same as -IOW (see -IOW), but it acts as an
active high input signal. Either -IOW or IOW is required to
transfer data from the CPU to 580 during a write operation.
-AS
24
I
Address Strobe. A logic 1 transition on -AS latches the state
of the chip selects and the register select bits, A0-A2. This
input is used when address and chip selects are not stable for
the duration of a read or write operation, i.e., a microprocessor
that needs to de-multiplex the address and data bits. If not
required, the -AS input can be permanently tied to a logic 0
(it is edge triggered).
D0-D7
43-47
2-4
I/O
Data Bus (Bi-directional) - These pins are the eight bit, three
state data bus for transferring information to or from the
controlling CPU. D0 is the least significant bit and the first
data bit in a transmit or receive serial data stream.
GND
18
Pwr
Signal and Power Ground.
Symbol
Pin
Signal
Pin Description
48
type
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