參數(shù)資料
型號: ST16C452PS
廠商: Exar Corporation
英文描述: Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器(帶并行打印機端口))
中文描述: 雙UART與并行打印機端口(雙通用異步接收器/發(fā)送器(帶并行打印機端口))
文件頁數(shù): 9/30頁
文件大?。?/td> 389K
代理商: ST16C452PS
9
ST16C452/452PS
Rev. 3.10
Table 4, INTERNAL REGISTER DECODE
A2
A1
A0
READ MODE
WRITE MODE
General Register Set (THR/RHR, IER/ISR, MCR/MSR, LCR/LSR, SPR): Note 1*
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Receive Holding Register
Transmit Holding Register
Interrupt Enable Register
Interrupt Status Register
Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
Scratchpad Register
Scratchpad Register
Baud Rate Register Set (DLL/DLM): Note *2
0
0
0
0
0
1
LSB of Divisor Latch
MSB of Divisor Latch
LSB of Divisor Latch
MSB of Divisor Latch
Printer Port Set (PR/SR/IOSEL/COM/CON): Note *3
X
X
X
0
0
1
0
1
0
PORT REGISTER
STATUS REGISTER
COMMAND REGISTER
PORT REGISTER
I/O SELECT REGISTER
CONTROL REGISTER
Note 1* The General Register set is accessible only when CS A or CS B is a logic 0.
Note 2* The Baud Rate register set is accessible only when CS A or CS B is a logic 0 and LCR bit-7 is a logic 1.
Note 3*: Printer Port Register set is accessible only when -CSP is a logic 0 in conjunction with the states of the
interface signal BIDEN and Printer Control Register bit-5 or IOSEL register.
Programmable Baud Rate Generator
The 452/452PS supports high speed modem tech-
nologies that have increased input data rates by
employing data compression schemes. For example
a 33.6Kbps modem that employs data compression
may require a 115.2Kbps input data rate. A 128.0Kbps
ISDN modem that supports data compression may
need an input data rate of 460.8Kbps. The 452/452PS
can support a standard data rate of 921.6Kbps.
Single baud rate generator is provided for the trans-
mitter and receiver, allowing independent TX/RX
channel control. The programmable Baud Rate Gen-
erator is capable of accepting an input clock up to 24
MHz, as required for supporting a 1.5Mbps data rate.
The 452/452PS requires that an external clock source
be connected to the CLK input pin to clock the internal
baud rate generator for standard or custom rates. (see
Baud Rate Generator Programming below).
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