- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383837 > ST16C452PS (Exar Corporation) Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶并行打印機端口）) PDF資料下載
參數(shù)資料
| 型號： | ST16C452PS |
| 廠商： | Exar Corporation |
| 英文描述： | Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶并行打印機端口）) |
| 中文描述： | 雙UART與并行打印機端口（雙通用異步接收器/發(fā)送器（帶并行打印機端口）） |
| 文件頁數(shù)： | 16/30頁 |
| 文件大?。?/td> | 389K |
| 代理商： | ST16C452PS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
16
ST16C452/452PS
Rev. 3.10
ISR BIT-0:
Logic 0 = An interrupt is pending and the ISR contents
may be used as a pointer to the appropriate interrupt
service routine.
Logic 1 = No interrupt pending. (normal default condi-
tion)
ISR BIT 1-3: (logic 0 or cleared is the default condition)
These bits indicate the source for a pending interrupt
at interrupt priority levels 1, 2, and 3 (See Interrupt
Source Table).
ISR BIT 4-7: (logic 0 or cleared is the default condition)
Not Used - initialized to a logic 0.
Line Control Register (LCR)
The Line Control Register is used to specify the
asynchronous data communication format. The word
length, the number of stop bits, and the parity are
selected by writing the appropriate bits in this register.
LCR BIT 0-1: (logic 0 or cleared is the default condi-
tion)
These two bits specify the word length to be transmit-
ted or received.
BIT-1
BIT-0
Word length
0
0
1
1
0
1
0
1
5
6
7
8
LCR BIT-2: (logic 0 or cleared is the default condition)
The length of stop bit is specified by this bit in
conjunction with the programmed word length.
BIT-2
Word length
Stop bit
length
(Bit time(s))
0
1
1
5,6,7,8
5
6,7,8
1
1-1/2
2
LCR BIT-3:
Parity or no parity can be selected via this bit.
Logic 0 = No parity. (normal default condition)
Logic 1 = A parity bit is generated during the transmis-
sion, receiver checks the data and parity for transmis-
sion errors.
LCR BIT-4:
If the parity bit is enabled with LCR bit-3 set to a logic
1, LCR BIT-4 selects the even or odd parity format.
Logic 0 = ODD Parity is generated by forcing an odd
number of logic 1s in the transmitted data. The
receiver must be programmed to check the same
format. (normal default condition)
Logic 1 = EVEN Parity
is generated by forcing an even
the number of logic 1s in the transmitted. The receiver
must be programmed to check the same format.
LCR BIT-5:
If the parity bit is enabled, LCR BIT-5 selects the
forced parity format.
LCR BIT-5 = logic 0, parity is not forced. (normal
default condition)
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit
is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit
is forced to a logical 0 for the transmit and receive
data.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C452 | Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶并行打印機端口）) |
| ST16C550 | UART with 16-Byte FIFO(通用異步接收器/發(fā)送器（帶16字節(jié)的先進先出）) |
| ST16C552 | Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進先出和并行打印機端口）) |
| ST16C552A | Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進先出和并行打印機端口）) |
| ST16C554DCJ68 | QUAD UART WITH 16-BYTE FIFOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C454 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) |
| ST16C454_05 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) |
| ST16C454CJ | 制造商:Exar Corporation 功能描述: |
| ST16C454CJ-0A-EVB | 功能描述:界面開發(fā)工具 Supports C454 68 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| ST16C454CJ68 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。