參數(shù)資料
型號(hào)： ST16C452PS
廠商： Exar Corporation
英文描述： Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶并行打印機(jī)端口）)
中文描述： 雙UART與并行打印機(jī)端口（雙通用異步接收器/發(fā)送器（帶并行打印機(jī)端口））
文件頁(yè)數(shù)： 19/30頁(yè)
文件大?。?/td> 389K
代理商： ST16C452PS
19
ST16C452/452PS
Rev. 3.10
Scratchpad Register (SPR)
The ST16C452/452PS provides a temporary data
register to store 8 bits of user information.
PRINTER PORT REGISTER DESCRIPTIONS
Port Register (PR)
PR BIT 0-7:
Printer Data port (Bi-directional) - These pins are the
eight bit data bus for transferring information to or
from an external device (usually a printer). D0 is the
least significant bit. PD7-PD0 are latched during a
write cycle (output mode).
I/O Select Register (IOSEL)
This bit is used in conjunction with the state of BIDEN
to set the direction (input/output) of the PD7-PD0 data
bus. This register is used only when BIDEN is a logic
0.
Logic 55 (Hex) + BIDEN 0 = PD7-PD0 are set for
output mode
Logic AA (Hex) + BIDEN 0 = PD7-PD0 are set for input
mode
Status Register (SR)
This register provides the printer port input logical
states and the status of the interrupt -INTP based on
the condition of the -ACK printer port interface signal.
The logical state of these pins is dependent on exter-
SR BIT 1-0:
Not Used - initialized to a logic 1.
SR BIT-2:
Logic 0 = an interrupt is pending
When INTSEL is a logic 0, SR bit-2 basically tracks the
-ACK input interface pin (returns to a logic 1 when the
-ACK input returns to a logic 1). However when
INTSEL is a logic 1, the latched mode is selected, SR
bit-2 goes to a logic 0 with the -ACK input but does not
return to a logic 1 until the end of the read cycle, i.e.,
reading SR will set this bit to a logic 1.
Logic 1 = no interrupt is pending. (normal inactive
state)
SR BIT-3:
Logic 0 = -ERROR input is a logic 0.
Logic 1 = -ERROR input is a logic 1. (normal inactive
state)
SR BIT-4:
Logic 0 = SLCT input is a logic 0. (normal inactive
state)
Logic 1 = SLCT input is a logic 1.
SR BIT-5:
Logic 0 = PE input is a logic 0. (normal inactive state)
Logic 1 = PE input is a logic 1.
SR BIT-6:
Logic 0 = -ACK input is a logic 0.
Logic 1 = -ACK input is a logic 1. (normal inactive
state)
SR BIT-7:
Logic 0 = BUSY input is a logic 0
Logic 1 = BUSY input is a logic 1 (normal inactive
state)
Command Register (COM)
This register provides the printer port input logical
states and the status of the printer interrupt INIT,
which is based on the state of CON bit-1.
COM BIT-0:
-STROBE is a bi-directional signal with an open
source driver and internal pull-up so that it may be
wire-ord with other outputs. COM bit-1 is used to read
status while CON bit 1 is used to set an output state.
If it is to function as an input, CON bit-1 shall be set to
a logic 1 first.
Logic 0 = -STROBE pin is a logic 1. (normal default
condition)
Logic 1 = -STROBE pin is a logic 0.
COM BIT-1:
-AutoFDXT is a bi-directional signal with an open
source driver and internal pull-up so that it may be
wire-ord with other outputs. COM bit-1 is used to read
status while CON bit 1 is used to set an output state.
If it is to function as an input, CON bit-1 shall be set to
相關(guān)PDF資料
PDF描述
ST16C452 Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶并行打印機(jī)端口）)
ST16C550 UART with 16-Byte FIFO(通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）)
ST16C552 Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口）)
ST16C552A Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口）)
ST16C554DCJ68 QUAD UART WITH 16-BYTE FIFOS
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