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參數(shù)資料
| 型號： | ST16C1551 |
| 廠商： | Exar Corporation |
| 英文描述： | UART with 16-Byte FIFO(通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）) |
| 中文描述： | 的UART具有16字節(jié)FIFO（通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）） |
| 文件頁數(shù)： | 8/32頁 |
| 文件大?。?/td> | 418K |
| 代理商： | ST16C1551 |
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ST16C1550/51
8
Rev. 3.10
GENERAL DESCRIPTION
The 155X provides serial asynchronous receive data
synchronization, parallel-to-serial and serial-to-paral-
lel data conversions for both the transmitter and
receiver sections. These functions are necessary for
converting the serial data stream into parallel data that
is required with digital data systems. Synchronization
for the serial data stream is accomplished by adding
start and stops bits to the transmit data to form a data
character (character orientated protocol). Data integ-
rity is insured by attaching a parity bit to the data
character. The parity bit is checked by the receiver for
any transmission bit errors. The electronic circuitry to
provide all these functions is fairly complex especially
when manufactured on a single integrated silicon
chip. The 155X represents such an integration with
greatly enhanced features. The 1550 is fabricated with
an advanced CMOS process.
The 155X is an upward solution that provides 16 bytes
of transmit and receive FIFO memory, instead of none
in the 16C1450. The 155X is designed to work with
high speed modems and shared network environ-
ments, that require fast data processing time. In-
creased performance is realized in the 155X by the
transmit and receive FIFOs. This allows the external
processor to handle more networking tasks within a
given time. For example, the ST16C1450 without a
receive FIFO, will require unloading of the RHR in 93
microseconds (This example uses a character length
of 11 bits, including start/stop bits at 115.2Kbps). This
means the external CPU will have to service the
receive FIFO less than every 100 microseconds.
However with the 16 byte FIFO in the 155X, the data
buffer will not require unloading/loading for 1.53 ms.
This increases the service interval giving the external
CPU additional time for other applications and reduc-
ing the overall UART interrupt servicing time. In
addition, the 4 selectable receive FIFO trigger inter-
rupt levels is uniquely provided for maximum data
throughput performance especially when operating in
a multi-channel environment. The FIFO memory
greatly reduces the bandwidth requirement of the
external controlling CPU, increases performance, and
reduces power consumption.
The 155X is capable of operation to 1.5Mbps with a 24
MHz clock input. With a crystal or external clock input
of 7.3728 MHz the user can select data rates up to
460.8 Kbps. Internal crystal clock operation is not
available on the 28 pin ST16C1551.
The rich feature set of the 155X is available through
internal registers. Selectable receive FIFO trigger
levels, selectable TX and RX baud rates, and modem
interface controls are all standard features. Following
a power on reset or an external reset, the 155X is
software compatible with the previous generation,
ST16C1550.
FUNCTIONAL DESCRIPTIONS
UART Functions
The UART provides the user with the capability to Bi-
directionally transfer information between an external
CPU, the 155X package, and an external serial de-
vice. A logic 0 on the chip select pin -CS allows the
user to configure, send data, and/or receive data via
the UART.
Internal Registers
The 155X provides 12 internal registers for monitoring
and control of the UART functions. These resisters are
shown in Table 3 below. The UART registers function
as data holding registers (THR/RHR), interrupt status
and control registers (IER/ISR), a FIFO control regis-
ter (FCR), line status and control registers (LCR/LSR),
modem status and control registers (MCR/MSR), pro-
grammable data rate (clock) control registers (DLL/
DLM), and a user assessable scratchpad register
(SPR).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C2550CQ48 | DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFO’S |
| ST16C2550IJ44 | DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFO’S |
| ST16C2550IP40 | DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFO’S |
| ST16C2550CJ44 | DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFO’S |
| ST16C2550CP40 | Power Supply IC; Supply Voltage Max:6V; Output Voltage:1.3V; Package/Case:20-TSSOP; Leaded Process Compatible:No; Output Voltage Max:1.3V; Peak Reflow Compatible (260 C):No; Supply Voltage Min:2.7V; Mounting Type:Surface Mount |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C1551CJ28 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V UART WITH 16-BYTE FIFO |
| ST16C1551CJ28-F | 功能描述:UART 接口集成電路 UART W/16BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C1551CP28 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V UART WITH 16-BYTE FIFO |
| ST16C1551CQ48 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V UART WITH 16-BYTE FIFO |
| ST16C1551CQ48-F | 功能描述:UART 接口集成電路 UART W/16BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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