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參數(shù)資料
| 型號： | SST55LC100-45-C-BWE |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | FLASH MEMORY DRIVE CONTROLLER, PBGA84 |
| 封裝： | ROHS COMPLIANT, MO-210, TFBGA-84 |
| 文件頁數(shù)： | 80/80頁 |
| 文件大?。?/td> | 758K |
| 代理商： | SST55LC100-45-C-BWE |
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Advance Information
CompactFlash Card Controller
SST55LC100
2005 Silicon Storage Technology, Inc.
S71298-00-000
10/05
9
TABLE
3-1: PIN ASSIGNMENTS (1 OF 6)
Signal Name
100-lead 84-ball
Pin
Type
I/O
Type1
Name and Functions
Host Side Interface
A10-A0
(Memory Card mode)
61
60
59
58
18
17
16
15
53
22
23
G8
G10
G9
H10
F2
F3
E1
E2
J8
G3
H1
II2D
These address lines along with the REG# signal are used to
select the following: The I/O port address registers within the
CompactFlash card, the memory mapped port address regis-
ters within the CompactFlash card, a byte in the card’s infor-
mation structure and its configuration control and status
registers.
A10-A0
(PC Card I/O mode)
This signal is the same as the PC Card Memory mode signal.
A2-A0
(True IDE mode)
53
22
23
J8
G3
H1
In True IDE mode only A[2:0] are used to select the one of
eight registers in the Task File.
A10-A3
61
60
59
58
18
17
16
15
G8
G10
G9
H10
F2
F3
E1
E2
The remaining address lines should be grounded by the host.
BVD1
(Memory Card mode)
54
J9
O
I2U, O1
This signal is asserted high as BVD1 is not supported.
STSCHG#
(PC Card I/O mode)
This signal is asserted low to alert the host to changes in the
Ready and Write Protect states, while the I/O interface is con-
figured. Its use is controlled by the Card Config and Status reg-
ister.
PDIAG#
(True IDE mode)
In the True IDE mode, this input/output is the Pass Diagnostic
signal in the master/slave handshake protocol.
BVD2
(Memory Card mode)
75
B10
O
I2U, O1
This signal is asserted high as BVD2 is not supported.
SPKR#
(PC Card I/O mode)
This output line is always driven to a high state in I/O mode
since the CompactFlash card controller does not support the
audio function.
DASP#
(True IDE mode)
In the True IDE mode, this input/output is the Disk Active/Slave
Present signal in the master/slave handshake protocol.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SST55LC100-45-C-TQWE | 功能描述:總線收發(fā)器 Compact Flash Card Controller RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SST55LC100-45-I-BWE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100-45-I-TQWE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100M | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100M-45-C-BWE | 功能描述:總線收發(fā)器 Compact Flash 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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