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參數(shù)資料
| 型號： | SN74ABT18504PMRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64 |
| 封裝： | GREEN, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 2/32頁 |
| 文件大?。?/td> | 505K |
| 代理商： | SN74ABT18504PMRG4 |
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SN54ABT18504, SN74ABT18504
SCAN TEST DEVICES WITH
20-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS108B – AUGUST 1992 – REVISED JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
10
data register description
boundary-scan register
The boundary-scan register (BSR) is 88 bits long. It contains one boundary-scan cell (BSC) for each
normal-function input pin and two BSCs for each normal-function I/O pin (one for input data and one for output
data). The BSR is used 1) to store test data that is to be applied internally to the inputs of the normal on-chip
logic and/or externally to the device output pins, and/or 2) to capture data that appears internally at the outputs
of the normal on-chip logic and/or externally at the device input pins.
The source of data to be captured into the BSR during Capture-DR is determined by the current instruction. The
contents of the BSR can change during Run-Test/Idle as determined by the current instruction. At power up or
in Test-Logic-Reset, the value of each BSC is reset to logic 0 except BSCs 87 – 86, which are reset to logic 1.
The boundary-scan register order of scan is from TDI through bits 87 – 0 to TDO. Table 1 shows the
boundary-scan register bits and their associated device pin signals.
Table 1. Boundary-Scan Register Configuration
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
87
OEAB
79
A20-I
59
A20-O
39
B20-I
19
B20-O
86
OEBA
78
A19-I
58
A19-O
38
B19-I
18
B19-O
85
CLKAB
77
A18-I
57
A18-O
37
B18-I
17
B18-O
84
CLKBA
76
A17-I
56
A17-O
36
B17-I
16
B17-O
83
CLKENAB
75
A16-I
55
A16-O
35
B16-I
15
B16-O
82
CLKENBA
74
A15-I
54
A15-O
34
B15-I
14
B15-O
81
LEAB
73
A14-I
53
A14-O
33
B14-I
13
B14-O
80
LEBA
72
A13-I
52
A13-O
32
B13-I
12
B13-O
––
71
A12-I
51
A12-O
31
B12-I
11
B12-O
––
70
A11-I
50
A11-O
30
B11-I
10
B11-O
––
69
A10-I
49
A10-O
29
B10-I
9
B10-O
––
68
A9-I
48
A9-O
28
B9-I
8
B9-O
––
67
A8-I
47
A8-O
27
B8-I
7
B8-O
––
66
A7-I
46
A7-O
26
B7-I
6
B7-O
––
65
A6-I
45
A6-O
25
B6-I
5
B6-O
––
64
A5-I
44
A5-O
24
B5-I
4
B5-O
––
63
A4-I
43
A4-O
23
B4-I
3
B4-O
––
62
A3-I
42
A3-O
22
B3-I
2
B3-O
––
61
A2-I
41
A2-O
21
B2-I
1
B2-O
––
60
A1-I
40
A1-O
20
B1-I
0
B1-O
boundary-control register
The boundary-control register (BCR) is 23 bits long. The BCR is used in the context of the RUNT instruction to
implement additional test operations not included in the basic SCOPE
instruction set. Such operations include
pseudo-random pattern generation (PRPG), parallel signature analysis (PSA) with input masking, and binary
count up (COUNT). Table 5 shows the test operations that are decoded by the BCR.
During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is
reset to the binary value 00000000000000000000010, which selects the PSA test operation with no input
masking.
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