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參數(shù)資料
| 型號： | SN54LVTH18502AHV |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 30/38頁 |
| 文件大?。?/td> | 556K |
| 代理商： | SN54LVTH18502AHV |
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Product Folder: SN54LVTH18502A, 3.3-V ABT Scan Test Devices With 18-Bit Universal Bus Transceivers
Keyword
Part Number
PRODUCT SUPPORT: TRAINING
SN54LVTH18502A, 3.3-V ABT Scan Test Devices With 18-Bit Universal Bus Transceivers
DEVICE STATUS: ACTIVE
PARAMETER NAME SN54LVTH18502A SN74LVTH18502A
Voltage Nodes (V) 3.3, 2.7
3.3, 2.7
Vcc range (V)
2.7 to 3.6
Input Level
TTL/CMOS
Output Level
LVTTL
Output Drive (mA) -24/24
-32/64
No. of Outputs
19
18
Logic
True
Static Current
30 mA
13
tpd max (ns)
5.2
4.9
FEATURES
q
Members of the Texas Instruments SCOPETM Family of Testability Products
q
Members of the Texas Instruments WidebusTM Family
q
State-of-the-Art 3.3-V ABT Design Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
q
Support Unregulated Battery Operation Down to 2.7 V
q
UBTTM (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
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Bus Hold on Data Inputs Eliminates the Need for External Pullup Resistors
q
B-Port Outputs of 'LVTH182502A Devices Have Equivalent 25-
Series Resistors, So No External Resistors Are Required
q
Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
q
SCOPETM Instruction Set
r
IEEE Standard 1149.1-1990 Required Instructions and Optional CLAMP and HIGHZ
r
Parallel-Signature Analysis at Inputs
r
Pseudorandom Pattern Generation From Outputs
r
Sample Inputs/Toggle Outputs
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Binary Count From Outputs
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Device Identification
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Even-Parity Opcodes
q
Packaged in 64-Pin Plastic Thin Quad Flat (PM) Packages Using 0.5-mm Center-to-Center Spacings and 68-Pin Ceramic Quad Flat (HV) Packages Using 25-mil Center-to-Center Spacings
SCOPE, Widebus, and UBT are trademarks of Texas Instruments Incorporated.
DESCRIPTION
The 'LVTH18502A and 'LVTH182502A scan test devices with 18-bit universal bus transceivers are members of the Texas Instruments SCOPETM testability integrated-circuit family. This family of devices
supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
Additionally, these devices are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
In the normal mode, these devices are 18-bit universal bus transceivers that combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes. They can be used either
as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-
test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPETM universal bus transceivers.
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