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參數(shù)資料
| 型號： | SN54LVTH18502AHV |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 21/38頁 |
| 文件大?。?/td> | 556K |
| 代理商： | SN54LVTH18502AHV |
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SN54LVTH18502A, SN54LVTH182502A, SN74LVTH18502A, SN74LVTH182502A
3.3-V ABT SCAN TEST DEVICES
WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS668B – JULY 1996 – REVISED MARCH 1999
28
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (normal mode) (see Figure 14)
SN54LVTH18502A
SN74LVTH18502A
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
CLKAB or CLKBA
0
100
0
80
0
100
0
80
MHz
t
Pulse duration
CLKAB or CLKBA high or low
4.6
5.8
4.4
5.6
ns
tw
Pulse duration
LEAB or LEBA high
3.2
3
ns
t
St
ti
A before CLKAB
↑ or
B before CLKBA
↑
3
3.2
2.8
3
tsu
Setup time
A before LEAB
↓ or
CLK high
1.6
1.1
1.5
0.7
ns
A before LEAB
↓ or
B before LEBA
↓
CLK low
1.8
1.6
th
Hold time
A after CLKAB
↑ or
B after CLKBA
↑
1.4
1.1
1.4
1.1
ns
h
A after LEAB
↓ or B after LEBA↓
3.4
4.2
3.1
3.5
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (test mode) (see Figure 14)
SN54LVTH18502A
SN74LVTH18502A
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
TCK
0
50
0
40
0
50
0
40
MHz
tw
Pulse duration
TCK high or low
9.5
10.5
9.5
10.5
ns
t
St
ti
A, B, CLK, LE, or OE
before TCK
↑
6.7
7.1
6.5
7
tsu
Setup time
TDI before TCK
↑
2.5
3.5
2.5
3.5
ns
TMS before TCK
↑
2.5
3.5
2.5
3.5
t
Hld ti
A, B, CLK, LE, or OE
after TCK
↑
1.5
1
1.5
1
th
Hold time
TDI after TCK
↑
1.5
1
1.5
1
ns
TMS after TCK
↑
1.5
1
1.5
1
td
Delay time
Power up to TCK
↑
50
ns
tr
Rise time
VCC power up
1
s
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