參數(shù)資料
型號: SMJ320C26FJ
廠商: TEXAS INSTRUMENTS INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 40 MHz, OTHER DSP, CQCC68
封裝: CERAMIC, LCC-68
文件頁數(shù): 17/40頁
文件大小: 577K
代理商: SMJ320C26FJ
SMJ320C26
DIGITAL SIGNAL PROCESSOR
SGUS 016A – AUGUST 1990 – REVISED AUGUST 2001
24
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
timing requirements over recommended operating conditions (see Note 1)
MIN
MAX
UNIT
tsu(IN)
INT/BIO/RS setup before CLKOUT1 high (see Note 6)
32
ns
th(IN)
INT/BIO/RS hold after CLKOUT1 high (see Note 6)
0
ns
tw(IN)
NT/BIO low pulse duration
tc(C)
ns
tw(RS)
RS low pulse duration
3tc(C)
ns
NOTES:
1. Q = 1/4tc(C)
3. A15–A0, PS, DS, IS, R/W, and BR timings are all included in timings referenced as “address.”
4. Delays between CLKOUT1/CLKOUT2 edges and STRB edges track each other, resulting in tw(SL) and tw(SH) being 2Q with no wait
states.
5. Read data access time is defined as ta(A) = tsu(A) + tw(SL) – tsu(D)R.
6. RS, INT, and BIO are asynchronous inputs and can occur at any time during a clock cycle. However, if the specified setup time is
met, the exact sequence shown in the timing diagram will occur. INT/BIO fall time must be less than 8 ns.
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