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參數(shù)資料
| 型號： | SMJ320C26FJ |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-BIT, 40 MHz, OTHER DSP, CQCC68 |
| 封裝： | CERAMIC, LCC-68 |
| 文件頁數(shù)： | 16/40頁 |
| 文件大?。?/td> | 577K |
| 代理商： | SMJ320C26FJ |
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SMJ320C26
DIGITAL SIGNAL PROCESSOR
SGUS 016A – AUGUST 1990 – REVISED AUGUST 2001
23
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
MEMORY AND PERIPHERAL INTERFACE TIMING
switching characteristics over recommended operating conditions (see Note 1)
PARAMETER
MIN
TYP
MAX
UNIT
td(C1-S)
STRB from CLKOUT1 (if STRB is present)
Q – 6
Q
Q+6
ns
td(C2-S)
CLKOUT2 to STRB (if STRB is present)
– 6
0
6
ns
tsu(A)
Address setup time before STRB low (see Note 3)
Q – 12
ns
th(A)
Address hold time after STRB high (see Note 3)
Q – 8
ns
tw(SL)
STRB low pulse duration (no wait states, see Note 4)
2Q – 5
2Q
2Q + 5
ns
tw(SH)
STRB high pulse duration (between consecutive cycles, see Note 4)
2Q
ns
tsu(D)W
Data write setup time before STRB high (no wait states)
2Q – 20
ns
th(D)W
Data write hold time from STRB high
Q – 10
Q
ns
ten(D)
Data bus starts being driven after STRB low (write cycle)
0
ns
tdis(D)
Data bus three-state after STRB high (write cycle)
Q
Q+15
ns
td(MSC)
MSC valid from CLKOUT1
– 10
0
10
ns
This parameter is not production tested.
timing requirements over recommended operating conditions (see Note 1)
MIN
MAX
UNIT
ta(A)
Read data access time from address time (read cycle) (see Notes 3 and 5)
3Q – 40
ns
tsu(D)R
Data read setup time before STRB high
23
ns
th(D)R
Data read hold time from STRB high
0
ns
td(SL-R)
READY valid after STRB low (no wait states)
Q – 22
ns
td(C2H-R) READY valid after CLKOUT2 high
Q – 22
ns
th(SL-R)
READY hold time after STRB low (no wait states)
Q+3
ns
th(C2H-R) READY hold after CLKOUT2 high
Q+3
ns
td(M-R)
READY valid after MSC valid
2Q –25
ns
th(M-R)
READY hold time after MSC valid
0
ns
This parameter is not production tested.
RS, INT, BIO, AND XF TIMING
switching characteristics over recommended operating conditions (see Note 1)
PARAMETER
MIN
TYP
MAX
UNIT
td(RS)
CLKOUT1 low to reset state entered
22
ns
td(IACK)
CLKOUT1 to IACK valid
– 8
0
8
ns
td(XF)
XF valid before falling edge of STRB
Q – 12
ns
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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| SMJ320C30GBM40 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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