- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98083 > SME5434PCI-480 64-BIT, 480 MHz, RISC PROCESSOR, XMA PDF資料下載
參數(shù)資料
| 型號： | SME5434PCI-480 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 480 MHz, RISC PROCESSOR, XMA |
| 封裝： | 130 X 100 MM, 45 MM HEIGHT MODULE |
| 文件頁數(shù)： | 1/34頁 |
| 文件大小： | 418K |
| 代理商： | SME5434PCI-480 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
Preliminary
DATA SHEET
1
SME5431PCI-360
SME5434PCI-440
SME5434PCI-480
UltraSPARC-II
i CPU Module
360/440/480MHz CPU; 0.25 to 2 MB L2 cache, UPA64S, 66MHz PCI
DESCRIPTION
The SME5431PCI and SME5434PCI UltraSPARC-IIi CPU Modules provide high-performance, SPARC v9
architecture computing on a mezzanine-style conguration consisting of an SME1430 UltraSPARC-IIi Micro-
processor [1], L2 cache SRAMs, and high speed clock logic. CPU-integrated memory and bus controllers drive
signals to two external connectors.
These three UltraSPARC i-series CPU modules run at up to 480 MHz and simplify system-board design while
providing upgradeable system performance. They include second-generation SME1430LGA UltraSPARC IIi
microprocessors which differ slightly from the SME1040 UltraSPARC-IIi microprocessors. See page 12.
The module provides EDO DRAM memory control, a UPA64S interface, and a PCI 2.1-compatible bus. The
DRAM data bus is ECC protected and multiplexed from 72 pins to 144 memory bits using data transceivers
on the system board controlled by the microprocessor. It uses 3.3 volt CMOS signaling. The UPA64S slave
interface operates at 1/4 CPU frequency, also uses 3.3 volt signalling and is compatible with Sun’s FFB Cre-
ator and AFB Elite graphics boards. The 66 MHz, 32-bit PCI bus is normally connected to Sun’s Advanced
PCI Bridge (APB) to provide two separate 32-bit, 33 MHz PCI 2.1-compatible buses.
1. See URL: http://www.sun.com/microelectronics/UltraSPARC/ for all UltraSPARC-i series products
Features
Benets
High performance UltraSPARC-IIi CPU
20.2 SPECint95 (est.),22.5 SPECfp95 (est.) at 480 MHz, 2 MB
L2 cache
SPARC V9 architecture
64-bit performance with binary compatibility with v8 and v9
application programs
Implements VIS
Instruction Set
Computing pipeline for 3D graphics, imaging,
compression/decompression, and network trafc
Double clocked 8-byte memory bus
Reduced pin count and peak memory bandwidth of up to 639
MB/s at 480 MHz
2-MB second-level cache clocked at 1/2 CPU
frequency
L2-cache bandwidth on module of up to 1.9 GB/s at 480 MHz
Components operate at 3.3V LVTTL and 1.9V HSTL
High bus speeds, lower power, and 3.3V LVTTL-compatible I/O
66 MHz PCI 2.1-compatible bus
Integrated interface simplies I/O system design
130 mm x 100 mm x 45 mm (height) form factor
Small-footprint, upgradeable
JTAG (IEEE 1149) boundary-scan interface
Board-level testability
System interface through two impedance-controlled
connectors
High-performance and reliable signal integrity
March 1999
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SMFR-29C516ESC | 16-BIT ERROR DETECT AND CORRECT CKT, QFP100 |
| SMJ320C26FJ | 16-BIT, 40 MHz, OTHER DSP, CQCC68 |
| SMJ320C31KGDM40B | 32-BIT, 40 MHz, OTHER DSP, UUC132 |
| SMJ320C40KGDS50C | 32-BIT, 50 MHz, OTHER DSP, UUC325 |
| SMJ320C40TABM40/10 | 32-BIT, 40 MHz, OTHER DSP, UUC325 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-ME6 | 制造商:Phoenix Contact 功能描述:Lock, switching, ME terminal |
| SME6.3T471M8X16LL | 制造商:Texas Instruments 功能描述:EA471-6R3M85 |
| SME6.3VB101M6X11LL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MINIATURE, GENERAL PURPOSE, SOLVENT PROOF |
| SME6.3VB102M10X12LL | 制造商:United Chemi-Con Inc 功能描述:Capacitor, Aluminium, 1mf, 6.3V, 20±% |
| SME6.3VB103M16X31LL | 功能描述:鋁質(zhì)電解電容器 - 帶引線 10KuF 6.3V RoHS:否 制造商:Kemet 引線類型: 電容:220 uF 容差:20 % 電壓額定值:25 V 工作溫度范圍: 端接類型:Radial 外殼直徑:8 mm 外殼長度:11 mm 引線間隔:5 mm 產(chǎn)品:General Purpose Electrolytic Capacitors 封裝:Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。