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參數(shù)資料
| 型號(hào)： | SMD1108 |
| 廠商： | Summit Microelectronics, Inc. |
| 英文描述： | 8-Channel Auto-Monitor ADC In System Programmable Analog (ISPA) Device |
| 中文描述： | 8通道自動(dòng)監(jiān)控ADC的在系統(tǒng)可編程模擬（ISPA）設(shè)備 |
| 文件頁(yè)數(shù)： | 12/29頁(yè) |
| 文件大小： | 734K |
| 代理商： | SMD1108 |
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12
SMD1108
2052 2.0 10/05/01
Preliminary
SUMMIT MICROELECTRONICS, Inc.
REGISTERS
REGISTER READ/WRITE
The registers are read and written using the same 2-wire
bus as the memory. The Configuration Registers and the
GFS Registers are written as shown in Figure 5. Reads
of the registers must be executed like a random Read
operation. That is, a dummy write must be issued in order
to set the address pointer for the following Read.
The Limits Registers for channels 0 through 3 are located
at the top of the ADC address space and utilize the 1001
DTI. Unlike the configuration registers that are limited to
single byte Writes or Reads, the ADC limit registers can
be written in page mode. The example In Figure 6 shows
two byte Writes to configure the CH0 Lower Limit.
Even though the ADC cannot be written, performing
commanded conversions (non-auto-monitor mode) re-
quires a dummy Write operation to select the proper
channel and indicate the type of conversion process that
is being requested. The sequence would be: address the
device using 1001 as the DTI followed by the bus address
and a write bit. The next byte contains the conversion
process requested and the channel or channel group to be
converted.
Single Channel Conversion
The single channel Read allows the host to perform
manual conversions on a single channel. The state of bits
CH2, CH1 and CH0 selects one-of-eight channels. Read-
ing DTI 1001 will return the converted data. If the host
continues clocking SCL without an interim Stop command
the SMD1108 will continue conversions on the selected
channel and output the data as clocked. See the timing
sequence diagrams in Figure 7.
Multi-Channel Conversion: 4
Command 001 will configure the channel conversion such
that the MUX will switch channels 0 through 3 sequentially.
Multi-Channel Conversion: 8
Command 011 will configure the channel conversion such
that the MUX will switch channels 0 through 7 sequentially.
Differential Conversion
In order to provide a very accurate current sense the
SMD1108 can perform a differential conversion on a
selected CHx/OCx input combination. This is limited to
channels 4 through 7 and their corresponding OC inputs.
The measurement provides the differential voltage be-
tween the input channels (V
CC0
/CH4 to V
CC3
/CH7) and the
over-current sense inputs (OC0 to OC3). The result is
that differential noise is rejected and an accurate voltage
drop across the sense resistor is measured.
Figure 5. Writing to the Configuration Registers
Figure 6. Writing to the Limits Registers
Table 3. Command/Address Byte
2052 Table03 1.0
7
6
5
4
3
2
1
0
t
D
M
C
2
H
C
1
H
C
0
H
C
x
x
n
o
n
u
F
0
0
0
2
H
C
1
H
C
0
H
C
e
d
o
m
d
a
e
n
n
a
h
c
e
n
0
0
1
x
1
e
d
o
m
d
a
e
s
u
o
u
n
o
C
0
1
1
x
2
e
d
o
m
d
a
e
s
u
o
u
n
o
C
1
0
0
1
1
H
C
0
H
C
n
o
v
n
o
c
l
e
D
A
C
K
W
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
A
2
A
1
A
0
1
1
0
Register Address
80 thru 9F
1
Configuration
Register Data
2052 Fig05 1.0
1
1
A
C
K
W
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
A
2
A
1
A
0
1
0
0
Register Address
F0:
1
1
0
0
1
0
0
D
9
D
8
x
x
x
x
x
x
1
1
A
C
K
W
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
A
2
A
1
A
0
1
0
0
Register Address
F1:
1
1
1
0
1
0
0
D
1
D
0
D
3
D
2
D
5
D
4
D
7
D
6
2052 Fig06 1.0
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