參數(shù)資料
型號: SM320MCM42CHFNM40
廠商: TEXAS INSTRUMENTS INC
元件分類: 數(shù)字信號處理
英文描述: 32-BIT, 40 MHz, OTHER DSP, CQFP408
封裝: TIE-BAR, CERAMIC, QFP-408
文件頁數(shù): 6/22頁
文件大?。?/td> 358K
代理商: SM320MCM42CHFNM40
SMJ320MCM42C, SMJ320MCM42D
DUAL SMJ320C40 MULTICHIP MODULE
SGKS001D – JULY 1997 – REVISED OCTOBER 2001
14
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
thermal analysis
Thermal conduction of components in the SMJ320MCM42 is dependent on thermal resistance of the material
under each die as well as die area thermally connected to the heat-dissipating medium. Since these properties
vary with layout and die size, C40 and SRAM components should be considered separately. Table 2 lists primary
parameters required for thermal analysis of the module. TJ, the maximum junction temperature, is not to be
exceeded for the C40s or the SRAM die.
Table 2. Thermal Characteristics
PARAMETER
MIN
TYP
MAX
UNIT
TJ
Maximum allowable junction temperature under operating condition
150
°C
PMCM
Module power dissipation
3.5
5.8
W
TJC_pkg
Average thermal impedance (junction to case) for the package
2.1
°C/W
TJA
Thermal impedance (junction to ambient air, 0 cfm) of package
20.5
°C/W
TSOL
Maximum solder temperature (10 s duration)
260
°C
TJC package data was taken under the following conditions: two C40s dissipating 1.05 W each and eight SRAMs dissipating 0.175 W each.
power estimation
During the operation verification, the power requirements of the SMJ320MCM42 are characterized over the
operating free-air temperature range. See the application report Calculation of TMS320C40 Power Dissipation
(literature number SPRA032) as reference for power estimation of the C40 components.
Typical power dissipation is measured with both C40s executing a 64-point fast Fourier transform (FFT)
algorithm. Input and output data arrays reside in module SRAM, and output data is written out to the
global-address space. The global databus is loaded with 80-pF test loads, and both local and global writes are
configured for zero-wait-state memory. Under typical conditions of 25
°C, 5-V VCC, and 40-MHz CLKIN
frequency, the power dissipation is measured to be 3.5 W.
Maximum power dissipation is measured under worst-case conditions. The global databus is loaded with 80-pF
test loads, and simultaneous zero-wait-state writes are performed to both local and global buses. Under
worst-case environment conditions of – 55
°C, 5.25-V VCC, and 40-MHz CLKIN frequency, the power dissipation
is determined to be 5.9 W. The algorithm executed during these tests consists of parallel writes of alternating
0xAAs and 0x55s to both local SRAM and global-address spaces. This algorithm is not considered to be a
practical use of the C40’s resources; therefore, the associated power measurement must be considered
absolute maximum only.
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