參數(shù)資料
型號: SM320MCM42CHFNM40
廠商: TEXAS INSTRUMENTS INC
元件分類: 數(shù)字信號處理
英文描述: 32-BIT, 40 MHz, OTHER DSP, CQFP408
封裝: TIE-BAR, CERAMIC, QFP-408
文件頁數(shù): 18/22頁
文件大?。?/td> 358K
代理商: SM320MCM42CHFNM40
SMJ320MCM42C, SMJ320MCM42D
DUAL SMJ320C40 MULTICHIP MODULE
SGKS001D – JULY 1997 – REVISED OCTOBER 2001
5
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Terminal Assignments (Continued)
TERMINAL
NO.
NAME
NO.
NAME
NO.
NAME
NO.
NAME
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
ROMEN_C40_#2
IIOF0_C40_#2
IIOF1_C40_#2
IIOF2_C40_#2
IIOF3_C40_#2
NMI_C40_#2
VCC_DR
VSS_CL
TCLK0_C40_#2
TCLK1_C40_#2
H3_C40_#2
H1_C40_#2
VSS_CL
IACK_C40_#2
VCC_DR
VSS_CL
VSS_DR
VCC_DR
VCC_CL
VSS_CL
VSS_DR
VSS_CL
VCC_DR
A30_C40_#2
A29_C40_#2
A28_C40_#2
VCC_DR
A27_C40_#2
A26_C40_#2
A25_C40_#2
A24_C40_#2
A23_C40_#2
A22_C40_#2
A21_C40_#2
A20_C40_#2
A19_C40_#2
A18_C40_#2
A17_C40_#2
VCC_DR
VSS_CL
VSS_DR
A16_C40_#2
A15_C40_#2
A14_C40_#2
A13_C40_#2
A12_C40_#2
A11_C40_#2
A10_C40_#2
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
A9_C40_#2
A8_C40_#2
A7_C40_#2
A6_C40_#2
A5_C40_#2
A4_C40_#2
VCC_DR
A3_C40_#2
A2_C40_#2
A1_C40_#2
A0_C40_#2
D31_C40_#1
D30_C40_#1
D29_C40_#1
D28_C40_#1
D27_C40_#1
D26_C40_#1
VCC_DR
D25_C40_#1
D24_C40_#1
D23_C40_#1
D22_C40_#1
D21_C40_#1
D20_C40_#1
D19_C40_#1
D18_C40_#1
D17_C40_#1
D16_C40_#1
VSS_CL
VCC_DR
VSS_DR
D15_C40_#1
D14_C40_#1
D13_C40_#1
D12_C40_#1
D11_C40_#1
D10_C40_#1
D9_C40_#1
D8_C40_#1
D7_C40_#1
D6_C40_#1
D5_C40_#1
VCC_DR
D4_C40_#1
D3_C40_#1
D2_C40_#1
D1_C40_#1
D0_C40_#1
CE1_C40_#1
RDY1_C40_#1
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
VSS_DR
VSS_CL
LOCK_C40_#1
VCC_CL
VSS_CL
CE0_C40_#1
RDY0_C40_#1
DE_C40_#1
TDI_C40_#1
PAGE1_C40_#1
R/W1_C40_#1
STRB1_C40_#1
STAT0_C40_#1
STAT1_C40_#1
VSS_CL
STAT2_C40_#1
STAT3_C40_#1
PAGE0_C40_#1
R/W0_C40_#1
STRB0_C40_#1
AE_C40_#1
RESETLOC1_C40_#1
VCC_DR
RESETLOC0_C40_#1
CRDY5_C40_#1
CSTRB5_C40_#1
CACK5_C40_#1
CREQ5_C40_#1
CRDY4_C40_#1
CSTRB4_C40_#1
CACK4_C40_#1
CREQ4_C40_#1
VSS_DR
VCC_DR
C5D7_C40_#1
C5D6_C40_#1
C5D5_C40_#1
C5D4_C40_#1
C5D3_C40_#1
C5D2_C40_#1
C5D1_C40_#1
C5D0_C40_#1
VCC_DR
C4D7_C40_#1
C4D6_C40_#1
C4D5_C40_#1
C4D4_C40_#1
C4D3_C40_#1
C4D2_C40_#1
C4D1_C40_#1
C4D0_C40_#1
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
VSS_DR
VCC_DR
C3D7_C40_#1
C3D6_C40_#1
C3D5_C40_#1
C3D4_C40_#1
C3D3_C40_#1
C3D2_C40_#1
C3D1_C40_#1
C3D0_C40_#1
VCC_DR
VSS_CL
C2D7_C40_#1
C2D6_C40_#1
C2D5_C40_#1
C2D4_C40_#1
C2D3_C40_#1
C2D2_C40_#1
C2D1_C40_#1
C2D0_C40_#1
VSS_DR
VCC_DR
CRDY3_C40_#1
CSTRB3_C40_#1
CACK3_C40_#1
CREQ3_C40_#1
VCC_CL
VSS_CL
CRDY2_C40_#1
CSTRB2_C40_#1
CACK2_C40_#1
CREQ2_C40_#1
VCC_DR
CRDY1_C40_#1
CSTRB1_C40_#1
CACK1_C40_#1
CREQ1_C40_#1
VSS_DR
VSS_CL
VSS_DR
VCC_DR
C1D7_C40_#1
C1D6_C40_#1
C1D5_C40_#1
C1D4_C40_#1
C1D3_C40_#1
C1D2_C40_#1
C1D1_C40_#1
C1D0_C40_#1
VCC_DR
VSS_DR
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