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參數(shù)資料
| 型號： | SLA24C64-S |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| 中文描述： | 8K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封裝： | PLASTIC, DSO-8 |
| 文件頁數(shù)： | 10/26頁 |
| 文件大?。?/td> | 358K |
| 代理商： | SLA24C64-S |
SLx 24C64
Semiconductor Group
10
Preliminary 1998-07-27
Figure 5
Timing of the Command Byte CSW
Figure 6
Timing of the Command Byte CSR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
0
1
0
CS2 CS1 CS0
0
0
0
0
A12
A10
A9
START from Master
Acknowledge from EEPROM
Acknowledge from EEPROM
SCL
SDA
Command Byte (CSW)
Data Transfer to EEPROM
IED02526
A8
A11
A0
A1
A2
A3
A4
A7
A6
A5
19
20
21
22
23
24
25
26
27
SDA
SCL
Acknowledge from EEPROM
ACK
ACK
ACK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
0
1
0
CS2 CS1 CS0
1
ACK
START from Master
Acknowledge from Master
Acknowledge from EEPROM
SCL
SDA
Command Byte (CSR)
Data Transfer from EEPROM
IED02517
ACK
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