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參數(shù)資料
| 型號： | SiI161ACT100 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SiI 161A PanelLink Receiver |
| 中文描述： | 精工161A條PanelLink接收機(jī) |
| 文件頁數(shù)： | 17/22頁 |
| 文件大?。?/td> | 260K |
| 代理商： | SII161ACT100 |
S ilic on Image, Inc .
SiI 161
A
SiI
-DS-0009-D
S ilic on Image, Inc .
17
Subject to Change without Notice
PCB Thermal Design Options:
The SiI161A is packaged in a thermally enhanced 100 pin TQFP with an exposed metal pad (7.5mm x 7.5 mm) on
the package designed for improved thermal dissipation. To improve the heat removal from the package, the exposed
thermal pad may be soldered to a thermal landing area on the PCB, as described in the following section, entitled
“Implementation Guidelines for Thermal Land Design”.
Implementation of the thermal landing area on the PCB can, in some cases, make trace routing and board design
complicated. In some applications, it may be desirable to eliminate the thermal landing area on the PCB.
Generally the thermal performance of a package can be represented by the following parameter (JEDEC standard
JESD 51-2, 51-6):
θ
JA
, Thermal resistance from junction to ambient
θ
JA
= (T
J
- T
A
) / P
H
Where T
J
is the junction temperature
T
A
is the ambient temperature
P
H
is the power dissipation
θ
JA
represents the resistance to the heat flows from the chip to ambient air. It is an index of heat dissipation
capability. Lower
θ
JA
means better thermal performance.
Implementation of the thermal landing area, combined with complete soldering of the package to the landing area
results in a
θ
JA
of 21
°
C/W. If the SiI161A package is assembled to a standard PCB, without the thermal landing
area, the
θ
JA
increases to 29
°
C/W. For comparison, the non-thermally enhanced 100 pin TQFP package has a
θ
JA
of
53
°
C/W, so the advantage of the exposed metal pad in the thermally enhanced SiI161A package is significant, even
without a landing area on the PCB.
In order to determine the requirements for soldering the SiI161A to the PCB, the following analysis is insightful.
Assuming a worst case scenario, with operation at the maximum ambient temperature of 70
°
C, at maximum voltage
(3.6V) and worst case pattern (330 mA) – the junction temperature would be 35
°
C above ambient, or 105
°
C. This is
still well below the maximum junction temperature of 125
°
C, providing suitable margin even without requiring the use
of solder and a specific landing area on the PCB. For comparison, with the improved thermal dissipation that results
from complete soldering of the thermal pad on the chip to a thermal landing area on the PCB, the package
temperature would be 23
°
C above ambient – or roughly 12
°
C cooler than a chip with no solder.
Based on this analysis, the need for designing a thermal landing area on a PCB for use with the SiI161A receiver
should be considered an optional design choice by the customer, and is not an absolute requirement.
For more information regarding Thermal Design Options, please see Application Note SiI-AN-0045, Enhanced
Thermal Packaging Options for SiI-161A.
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