- 您現(xiàn)在的位置：買賣IC網 > PDF目錄1967 > SC5554MVR132 (Freescale Semiconductor)MCU MPC5554 DP ONLY 416-PBGA PDF資料下載
參數(shù)資料
| 型號： | SC5554MVR132 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 52/58頁 |
| 文件大小： | 0K |
| 描述： | MCU MPC5554 DP ONLY 416-PBGA |
| 標準包裝： | 200 |
| 系列： | MPC55xx Qorivva |
| 核心處理器： | e200z6 |
| 芯體尺寸： | 32-位 |
| 速度： | 132MHz |
| 連通性： | CAN，EBI/EMI，SCI，SPI |
| 外圍設備： | DMA，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 256 |
| 程序存儲器容量： | 2MB（2M x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 64K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.35 V ~ 1.65 V |
| 數(shù)據(jù)轉換器： | A/D 40x12b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 416-TBGA |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁當前第52頁第53頁第54頁第55頁第56頁第57頁第58頁
MPC5554 Microcontroller Data Sheet, Rev. 4
Revision History for the MPC5554 Data Sheet
Freescale Semiconductor
56
Table 20 (JTAG Pin AC Electrical Characteristics) JTAG Pin AC Electrical Characteristics
Footnote 1: Removed VDD = 1.35–1.65 V, and VDD33 and VDDSYN = 3.0–3.6 V.
Table 22 (Bus Operation Timing) Bus Operation Timing:
External Bus Frequency in the table heading: Added footnote that reads: Speed is the nominal maximum
frequency. Max speed is the maximum speed allowed including frequency modulation (FM). 82 MHz parts allow
for 80 MHz system clock + 2% FM; 114 MHz parts allow for 112 MHz system clock + 2% FM; and 132 MHz parts
allow for 128 MHz system clock + 2% FM.
Specifications 5, 6, 7, and 8: Reordered the EBI signals within each specification.
Specifications 7 and 8: Removed EBI signals BDIP, OE, TSIZ[0:1], WE/BE[0:3].
Footnote 1: Removed VDD = 1.35–1.65 V, and VDD33 and VDDSYN = 3.0–3.6 V.
Footnote 8: Changed EBTS to SIU_ECCR[EBTS].
Table 23 (External Interrupt Timing) External Interrupt Timing (IRQ Signals)
Footnote 1: Removed VDD = 1.35–1.65 V; changed VDDEH = 3.0–5.5 V to VDDEH = 3.0–5.25 V.
Table 24 (eTPU Timing) eTPU Timing
Footnote 1: Changed VDDEH = 3.0–5.5 V to VDDEH = 3.0–5.25 V.
Table 25 (eMIOS Timing) eMIOS Timing
Footnote 1: Changed VDDEH = 3.0–5.5 V to VDDEH = 3.0–5.25 V.
Table 26 (DSPI Timing’) DSPI Timing:
Footnote 1, changed ‘VDDEH = 3.0–5.5 V;’ to ‘VDDEH = 3.0–5.25 V;’
Table Title: Added footnote that reads: Speed is the nominal maximum frequency. Max speed is the maximum
speed allowed including frequency modulation (FM). 82 MHz parts allow for 80 MHz system clock + 2% FM;
114 MHz parts allow for 112 MHz system clock + 2% FM; and 132 MHz parts allow for
128 MHz system clock + 2% FM.
Spec 1: SCK cycle time; Changed to 80 MHz minimum column from 25 to 24.4; 112 MHz minimum column from
17.9 to 17.5; 112 MHz maximum column from 2.0 to 2.1.
Table 27 (EQADC SSI Timing Characteristics) EQADC SSI Timing Characteristics
Footnote 1: Changed VDDEH = 3.0–5.5 V to VDDEH = 3.0–5.25 V.
Table 28. Changes Between Rev. 2.0 and 3.0 (continued)
Location
Description of Changes
相關PDF資料 |
PDF描述 |
|---|---|
| SCC2681AE1A44,529 | IC UART DUAL 44-PLCC |
| SCC2691AC1N24,129 | IC UART 24-DIP |
| SCC2692AC1N28,602 | IC DUART 28-DIP |
| SCC2698BC1A84,512 | IC UART OCTAL ENHANCED 84-PLCC |
| SCC68681C1N40,112 | IC DUART 40DIP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SC5554MZP112 | 制造商:Freescale Semiconductor 功能描述:MPC5554, 84M68C, DP ONLY - Trays |
| SC5554MZP112R2 | 制造商:Freescale Semiconductor 功能描述:MPC5554, 84M68C, DP ONLY - Tape and Reel |
| SC5554MZP132 | 制造商:Freescale Semiconductor 功能描述:32-BIT MPC55XX POWERPC RISC 2MB FLASH 1.8V/2.5V/3.3V/5V 416 - Trays |
| SC5554MZP132R2 | 制造商:Freescale Semiconductor 功能描述:MPC5554, 84M68C, DP ONLY - Tape and Reel |
| SC5565MVZ132 | 制造商:Freescale Semiconductor 功能描述:2MB FLASH W/ECC, 3 CANS - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復。