參數(shù)資料
型號(hào): SC403MLTRT
廠商: Semtech
文件頁(yè)數(shù): 3/32頁(yè)
文件大?。?/td> 741K
描述: IC REG DL BCK/LINEAR SYNC 32MLPQ
標(biāo)準(zhǔn)包裝: 1
系列: EcoSpeed®, SmartDrive™
拓?fù)洌?/td> 降壓(降壓)同步(1),線性(LDO)(1)
功能: 任何功能
輸出數(shù): 2
頻率 - 開關(guān): 1MHz
電壓/電流 - 輸出 1: 可調(diào)至 0.75V,6A
電壓/電流 - 輸出 2: 可調(diào)至 0.75V,200mA
帶 LED 驅(qū)動(dòng)器:
帶監(jiān)控器:
帶序列發(fā)生器:
電源電壓: 3 V ~ 28 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-MLPQ(5x5)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: SC403MLDKR
SC403
3
Absolute Maximum Ratings
LX to PGND (V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +30
LX to PGND (V) (transient  100ns max.) ......-2 to +30
VIN to PGND (V) ............................-0.3 to +30
EN/PSV, PGOOD, ILIM, to GND (V) ...... -0.3 to +(V
DD
 + 0.3)
SS, VOUT, FB, FBL, to GND (V) .........-0.3 to +(V
DD
 + 0.3)
VDD to PGND (V) ........................... -0.3 to +6
TON to AGND (V). . . . . . . . . . . . . . . . . . . . . -0.3 to +(VDD - 1.5)
ENL (V) ...................................... -0.3 to V
IN
BST to LX (V) ..............................-0.3 to +6.0
BST to PGND (V) ...........................-0.3 to +35
AGND to PGND (V) .........................-0.3 to +0.3
ESD Protection Level
(1)
(kV) ............................ 2
Recommended Operating Conditions
Input Voltage (V) ............................. 3.0 to 28
VDD to PGND (V) ............................3.0 to 5.5
VOUT to PGND (V) ...........................0.75 to 5.5
Thermal Information
Storage Temperature (癈) ....................-60 to +150
Maximum Junction Temperature (癈) ............... 150
Operating Junction Temperature (癈) ......-40 to +125
Thermal resistance, junction to ambient
(2)
 (癈/W)
High-side MOSFET ............................... 48
Low-side MOSFET ............................... 38
PWM controller and LDO thermal resistance ..... 36
Peak IR Reflow Temperature (癈) .................... 260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Tested according to JEDEC standard JESD22-A114.
(2) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Unless specified: V
IN
 =12V, T
A
 = +25癈 for Typ, -40 to +85 癈 for Min and Max, T
J
 < 125癈, V
DD
 = +5V, per applicable Detailed Application Circuit
Electrical Characteristics
Parameter
Conditions
Min  Typ  Max  Units
Input Supplies
VIN UVLO Threshold
(1)
Sensed at ENL pin, rising edge
2.40  2.60   2.95
V
Sensed at ENL pin, falling edge
2.235  2.40  2.565
VIN UVLO Hysteresis
EN/PSV = High
0.2
V
VDD UVLO Threshold
Measured at VDD pin, rising edge
2.5
3.0
V
Measured at VDD pin, falling edge
2.4
2.9
VDD UVLO Hysteresis
0.2
V
VIN Supply Current
ENL , EN/PSV = 0V, V
IN
 = 16V
8.5   20
Standby mode; ENL=V
DD
, EN/PSV = 0V
130
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