參數(shù)資料
型號: SC16C554B
廠商: NXP Semiconductors N.V.
英文描述: 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
中文描述: 5伏,3.3伏和2.5伏兆5四異步/秒(最大),16字節(jié)的FIFO
文件頁數(shù): 12/51頁
文件大?。?/td> 253K
代理商: SC16C554B
9397 750 13133
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 9 February 2005
12 of 51
Philips Semiconductors
SC16C554B/554DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
RXA, RXB,
RXC, RXD
7, 29,
41, 63
62, 20,
29, 51
17, 44,
57, 4
I
Receive data input RXA to RXD.
These inputs are associated with
individual serial channel data to the SC16C554B/554DB. The RX
signal will be a logic 1 during reset, idle (no data), or when the
transmitter is disabled. During the local loop-back mode, the RX
input pin is disabled and TX data is connected to the UART RX
input internally.
Receive Ready (active LOW).
RXRDY contains the wire-ORed
status of all four receive channel FIFOs, RXRDYA to RXRDYD. A
logic 0 indicates receive data ready status, that is, the RHR is full, or
the FIFO has one or more RX characters available for unloading.
This pin goes to a logic 1 when the FIFO/RHR is empty, or when
there are no more characters available in either the FIFO or RHR.
Individual channel RX status is read by examining individual internal
registers via CS and A0 to A4 pin functions.
Transmit data A, B, C, D.
These outputs are associated with
individual serial transmit channel data from the
SC16C554B/554DB. The TX signal will be a logic 1 during reset,
idle (no data), or when the transmitter is disabled. During the local
loop-back mode, the TX output pin is disabled and TX data is
internally connected to the UART RX input.
Transmit Ready (active LOW).
TXRDY contains the wire-ORed
status of all four transmit channel FIFOs, TXRDYA to TXRDYD. A
logic 0 indicates a buffer ready status, that is, at least one location is
empty and available in one of the TX channels (A to D). This pin
goes to a logic 1 when all four channels have no more empty
locations in the TX FIFO or THR. Individual channel TX status can
be read by examining individual internal registers via CS and
A0 to A4 pin functions.
Power supply inputs.
RXRDY
38
-
54
O
TXA, TXB,
TXC, TXD
17, 19,
51, 53
8, 10,
39, 41
29, 32,
69, 72
O
TXRDY
39
-
55
O
V
CC
13, 30,
47, 64
35
4, 21,
35, 52
25
5, 25,
45, 65
50
I
XTAL1
I
Crystal or external clock input.
Functions as a crystal input or as
an external clock input. A crystal can be connected between this pin
and XTAL2 to form an internal oscillator circuit (see
Figure 11
).
Alternatively, an external clock can be connected to this pin to
provide custom data rates. (See
Section 6.6 “Programmable baud
rate generator”
.)
Output of the crystal oscillator or buffered clock.
(See also
XTAL1.) Crystal oscillator output or buffered clock output.
XTAL2
36
26
51
O
Table 2:
Pin description
…continued
Pin
PLCC68
Symbol
Type
Description
LQFP64
LQFP80
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參數(shù)描述
SC16C554B_10 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
SC16C554BIB64 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C554BIB64,128 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C554BIB64,128 PBF 制造商:NXP Semiconductors 功能描述:
SC16C554BIB64,151 功能描述:UART 接口集成電路 4CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel