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參數(shù)資料
| 型號： | SB83C196KD |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | SQFP-80 |
| 文件頁數(shù)： | 25/25頁 |
| 文件大?。?/td> | 1691K |
| 代理商： | SB83C196KD |
8XC196KD/8XC196KD20
PIN DESCRIPTIONS (Continued)
Symbol
Name and Function
Port 0
8-bit high impedance input-only port. These pins can be used as digital inputs and/or as
analog inputs to the on-chip A/D converter.
Port 1
8-bit quasi-bidirectional I/O port.
Port 2
8-bit multi-functional port. All of its pins are shared with other functions in the 8XC196KD.
Pins 2.6 and 2.7 are quasi-bidirectional.
Ports 3 and 4
8-bit bidirectional I/O ports with open drain outputs. These pins are shared with the
multiplexed address/data bus which has strong internal pullups.
HOLD
Bus Hold input requesting control of the bus.
HLDA
Bus Hold acknowledge output indicating release of the bus.
BREQ
Bus Request output activated when the bus controller has a pending external memory
cycle.
PMODE
Determines the EPROM programming mode.
PACT
A low signal in Auto Programming mode indicates that programming is in process. A high
signal indicates programming is complete.
PALE
A falling edge in Slave Programming Mode and Auto Configuration Byte Programming
Mode indicates that ports 3 and 4 contain valid programming address/command
information (input to slave).
PROG
A falling edge in Slave Programming Mode indicates that ports 3 and 4 contain valid
programming data (input to slave).
PVER
A high signal in Slave Programming Mode and Auto Configuration Byte Programming
Mode indicates the byte programmed correctly.
CPVER
Cummulative Program Output Verification. Pin is high if all locations have programmed
correctly since entering a programming mode.
AINC
Auto Increment. Active low input enables the auto increment mode. Auto increment allows
reading or writing sequential EPROM locations without address transactions across the
PBUS for each read or write.
9
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