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參數(shù)資料
| 型號： | SB83C196KD |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | SQFP-80 |
| 文件頁數(shù)： | 15/25頁 |
| 文件大小： | 1691K |
| 代理商： | SB83C196KD |
8XC196KD/8XC196KD20
OTPROM SPECIFICATIONS
OPERATING CONDITIONS
Symbol
Description
Min
Max
Units
TA
Ambient Temperature During Programming
20
30
C
VCC
Supply Voltage During Programming
4.5
5.5
V(1)
VREF
Reference Supply Voltage During Programming
4.5
5.5
V(1)
VPP
Programming Voltage
12.25
12.75
V(2)
VEA
EA Pin Voltage
12.25
12.75
V(2)
FOSC
Oscillator Frequency during Auto and Slave
6.0
8.0
MHz
Mode Programming
FOSC
Oscillator Frequency during
6.0
16.0
MHz
Run-Time Programming (8XC196KD)
FOSC
Oscillator Frequency during
6.0
20.0
MHz
Run-Time Programming (8XC196KD20)
NOTES:
1. VCC and VREF should nominally be at the same voltage during programming.
2. VPP and VEA must never exceed the maximum specification, or the device may be damaged.
3. VSS and ANGND should nominally be at the same potential (0V).
4. Load capacitance during Auto and Slave Mode programming e 150 pF.
AC OTPROM PROGRAMMING CHARACTERISTICS (SLAVE MODE)
Symbol
Description
Min
Max
Units
TSHLL
Reset High to First PALE Low
1100
TOSC
TLLLH
PALE Pulse Width
50
TOSC
TAVLL
Address Setup Time
0
TOSC
TLLAX
Address Hold Time
100
TOSC
TPLDV
PROG Low to Word Dump Valid
50
TOSC
TPHDX
Word Dump Data Hold
50
TOSC
TDVPL
Data Setup Time
0
TOSC
TPLDX
Data Hold Time
400
TOSC
TPLPH(1)
PROG Pulse Width
50
TOSC
TPHLL
PROG High to Next PALE Low
220
TOSC
TLHPL
PALE High to PROG Low
220
TOSC
TPHPL
PROG High to Next PROG Low
220
TOSC
TPHIL
PROG High to AINC Low
0
TOSC
TILIH
AINC Pulse Width
240
TOSC
TILVH
PVER Hold after AINC Low
50
TOSC
TILPL
AINC Low to PROG Low
170
TOSC
TPHVL
PROG High to PVER Valid
220
TOSC
NOTE:
1. This specification is for the Word Dump Mode. For programming pulses, use the Modified Quick Pulse Algorithm.
22
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