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| 型號： | SAX-XC878M-13FFI5V |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 24 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 14/141頁 |
| 文件大?。?/td> | 2385K |
| 代理商： | SAX-XC878M-13FFI5V |
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XC878CLM
Functional Description
Data Sheet
103
V1.1, 2009-08
3.23
On-Chip Debug Support
The On-Chip Debug Support (OCDS) provides the basic functionality required for the
software development and debugging of XC800-based systems.
The OCDS design is based on these principles:
Use the built-in debug functionality of the XC800 Core
Add a minimum of hardware overhead
Provide support for most of the operations by a Monitor Program
Use standard interfaces to communicate with the Host (a Debugger)
Features
Set breakpoints on instruction address and on address range within the Program
Memory
Set breakpoints on internal RAM address range
Support unlimited software breakpoints in Flash/RAM code region
Process external breaks via JTAG and upon activating a dedicated pin
Step through the program code
The OCDS functional blocks are shown in Figure 32. The Monitor Mode Control (MMC)
block at the center of OCDS system brings together control signals and supports the
overall functionality. The MMC communicates with the XC800 Core, primarily via the
Debug Interface, and also receives reset and clock signals.
After processing memory address and control signals from the core, the MMC provides
proper access to the dedicated extra-memories: a Monitor ROM (holding the code) and
a Monitor RAM (for work-data and Monitor-stack).
The OCDS system is accessed through the JTAG1), which is an interface dedicated
exclusively for testing and debugging activities and is not normally used in an
application. The dedicated MBC pin is used for external configuration and debugging
control.
Note: All the debug functionality described here can normally be used only after XC878
has been started in OCDS mode.
1) The pins of the JTAG port can be assigned to either the primary port (Port 0) or either of the secondary ports
(Ports 1 and 2/Port 5).
User must set the JTAG pins (TCK and TDI) as input during connection with the OCDS system.
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