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參數(shù)資料
| 型號： | SAK-TC1767-256F133HL |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 133 MHz, RISC MICROCONTROLLER, PQFP176 |
| 封裝： | 0.50 MM PITCH, GREEN, PLASTIC, LQFP-176 |
| 文件頁數(shù)： | 43/126頁 |
| 文件大?。?/td> | 826K |
| 代理商： | SAK-TC1767-256F133HL |
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TC1767
Introduction
Data Sheet
19
V1.3, 2009-09
2.3.3
System Timer
The TC1767’s STM is designed for global system timing applications requiring both high
precision and long range.
Features
Free-running 56-bit counter
All 56 bits can be read synchronously
Different 32-bit portions of the 56-bit counter can be read synchronously
Flexible interrupt generation based on compare match with partial STM content
Driven by maximum 80 MHz (=
f
SYS, default after reset = fSYS/2)
Counting starts automatically after a reset operation
STM registers are reset by an application reset if bit ARSTDIS.STMDIS is cleared. If
bit ARSTDIS.STMDIS is set, the STM is not reset.
STM can be halted in debug/suspend mode
Special STM register semantics provide synchronous views of the entire 56-bit counter,
or 32-bit subsets at different levels of resolution.
The maximum clock period is 2
56
× f
STM. At fSTM = 80 MHz, for example, the STM counts
28.56 years before overflowing. Thus, it is capable of continuously timing the entire
expected product life time of a system without overflowing.
In case of a power-on reset, a watchdog reset, or a software reset, the STM is reset. After
one of these reset conditions, the STM is enabled and immediately starts counting up. It
is not possible to affect the content of the timer during normal operation of the TC1767.
The timer registers can only be read but not written to.
The STM can be optionally disabled for power-saving purposes, or suspended for
debugging purposes via its clock control register. In suspend mode of the TC1767
(initiated by writing an appropriate value to STM_CLC register), the STM clock is
stopped but all registers are still readable.
Due to the 56-bit width of the STM, it is not possible to read its entire content with one
instruction. It needs to be read with two load instructions. Since the timer would continue
to count between the two load operations, there is a chance that the two values read are
not consistent (due to possible overflow from the low part of the timer to the high part
between the two read operations). To enable a synchronous and consistent reading of
the STM content, a capture register (STM_CAP) is implemented. It latches the content
of the high part of the STM each time when one of the registers STM_TIM0 to STM_TIM5
is read. Thus, STM_CAP holds the upper value of the timer at exactly the same time
when the lower part is read. The second read operation would then read the content of
the STM_CAP to get the complete timer value.
The content of the 56-bit System Timer can be compared against the content of two
compare values stored in the STM_CMP0 and STM_CMP1 registers. Interrupts can be
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAK-TC1767-256F133HL AD | 功能描述:32位微控制器 - MCU 32 BIT FLASH RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| SAK-TC1767-256F133HLAD | 制造商:Infineon Technologies AG 功能描述: |
| SAK-TC1767-256F80HL | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32-Bit Single-Chip Microcontroller |
| SAK-TC1767-256F80HL AD | 功能描述:32位微控制器 - MCU 32 BIT FLASH RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| SAK-TC1767-256F80HLAD | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
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